Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Rename global_mem_cache_type::write_only to read_write #875

Merged
merged 4 commits into from
Dec 13, 2022
Merged

Rename global_mem_cache_type::write_only to read_write #875

merged 4 commits into from
Dec 13, 2022

Conversation

nilsfriess
Copy link
Collaborator

According to Table 25 in section A.3 of the SYCL 2020 Specification, the enum global_mem_cache_type should contain the entries none, read_only, and read_write. The last one was called write_only in hipSYCL, this PR renames it (and also other "linked" names to be consistent with naming).

Should fix #432

@@ -164,7 +164,7 @@ bool cuda_hardware_context::has(device_support_aspect aspect) const {
case device_support_aspect::global_mem_cache_read_only:
return false;
break;
case device_support_aspect::global_mem_cache_write_only:
case device_support_aspect::global_mem_cache_read_write:
return false;
Copy link
Collaborator

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Now that the semantics has changed from write-only to read-write - I suspect we will have to return true for CUDA, since I think CUDA hardware has read-write cache. But better check to be sure ;)

@@ -171,7 +171,7 @@ bool hip_hardware_context::has(device_support_aspect aspect) const {
case device_support_aspect::global_mem_cache_read_only:
return false;
break;
case device_support_aspect::global_mem_cache_write_only:
case device_support_aspect::global_mem_cache_read_write:
Copy link
Collaborator

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Same question here ;)

@@ -83,7 +83,7 @@ bool omp_hardware_context::has(device_support_aspect aspect) const {
case device_support_aspect::global_mem_cache_read_only:
return false;
break;
case device_support_aspect::global_mem_cache_write_only:
case device_support_aspect::global_mem_cache_read_write:
Copy link
Collaborator

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

CPUs definitely have read-write cache

@@ -263,7 +263,7 @@ bool ze_hardware_context::has(device_support_aspect aspect) const {
case device_support_aspect::global_mem_cache_read_only:
return false;
break;
case device_support_aspect::global_mem_cache_write_only:
case device_support_aspect::global_mem_cache_read_write:
Copy link
Collaborator

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Same question here

case device_support_aspect::global_mem_cache_write_only:
return false;
case device_support_aspect::global_mem_cache_read_write:
return true;
Copy link
Collaborator Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

I couldn't actually find a reference stating that all devices that can be used with Level Zero have read/write cache but dpc++ returns true here, and I think we can trust that this is true then.

Copy link
Collaborator

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Agreed :)

Copy link
Collaborator

@illuhad illuhad left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

From my side this looks good. Is this ready to go @nilsfriess ?

@nilsfriess
Copy link
Collaborator Author

Yes it is :)

@illuhad illuhad merged commit 013ae9c into AdaptiveCpp:develop Dec 13, 2022
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

info :: global_mem_cache_type differs from sycl/1.2.1 spec.
2 participants