mips.syr

Release 14.7 - xst P.20131013 (nt64)
Copyright (c) 1995-2013 Xilinx, Inc.  All rights reserved.
--> Parameter TMPDIR set to xst/projnav.tmp


Total REAL time to Xst completion: 0.00 secs
Total CPU time to Xst completion: 0.12 secs
 
--> Parameter xsthdpdir set to xst


Total REAL time to Xst completion: 0.00 secs
Total CPU time to Xst completion: 0.13 secs
 
--> Reading design: mips.prj

TABLE OF CONTENTS
  1) Synthesis Options Summary
  2) HDL Parsing
  3) HDL Elaboration
  4) HDL Synthesis
       4.1) HDL Synthesis Report
  5) Advanced HDL Synthesis
       5.1) Advanced HDL Synthesis Report
  6) Low Level Synthesis
  7) Partition Report
  8) Design Summary
       8.1) Primitive and Black Box Usage
       8.2) Device utilization summary
       8.3) Partition Resource Summary
       8.4) Timing Report
            8.4.1) Clock Information
            8.4.2) Asynchronous Control Signals Information
            8.4.3) Timing Summary
            8.4.4) Timing Details
            8.4.5) Cross Clock Domains Report


=========================================================================
*                      Synthesis Options Summary                        *
=========================================================================
---- Source Parameters
Input File Name                    : "mips.prj"
Ignore Synthesis Constraint File   : NO

---- Target Parameters
Output File Name                   : "mips"
Output Format                      : NGC
Target Device                      : xc6slx9-3-tqg144

---- Source Options
Top Module Name                    : mips
Automatic FSM Extraction           : YES
FSM Encoding Algorithm             : Auto
Safe Implementation                : No
FSM Style                          : LUT
RAM Extraction                     : Yes
RAM Style                          : Auto
ROM Extraction                     : Yes
Shift Register Extraction          : YES
ROM Style                          : Auto
Resource Sharing                   : YES
Asynchronous To Synchronous        : NO
Shift Register Minimum Size        : 2
Use DSP Block                      : Auto
Automatic Register Balancing       : No

---- Target Options
LUT Combining                      : Auto
Reduce Control Sets                : Auto
Add IO Buffers                     : YES
Global Maximum Fanout              : 100000
Add Generic Clock Buffer(BUFG)     : 16
Register Duplication               : YES
Optimize Instantiated Primitives   : NO
Use Clock Enable                   : Auto
Use Synchronous Set                : Auto
Use Synchronous Reset              : Auto
Pack IO Registers into IOBs        : Auto
Equivalent register Removal        : YES

---- General Options
Optimization Goal                  : Speed
Optimization Effort                : 1
Power Reduction                    : NO
Keep Hierarchy                     : No
Netlist Hierarchy                  : As_Optimized
RTL Output                         : Yes
Global Optimization                : AllClockNets
Read Cores                         : YES
Write Timing Constraints           : NO
Cross Clock Analysis               : NO
Hierarchy Separator                : /
Bus Delimiter                      : <>
Case Specifier                     : Maintain
Slice Utilization Ratio            : 100
BRAM Utilization Ratio             : 100
DSP48 Utilization Ratio            : 100
Auto BRAM Packing                  : NO
Slice Utilization Ratio Delta      : 5

=========================================================================


=========================================================================
*                          HDL Parsing                                  *
=========================================================================
Analyzing Verilog file "G:\program\xilinx\FPGA_Project\sign_extend.v" into library work
Parsing module <sign_extend>.
Analyzing Verilog file "G:\program\xilinx\FPGA_Project\register_bank.v" into library work
Parsing module <register_bank>.
Analyzing Verilog file "G:\program\xilinx\FPGA_Project\register_32b.v" into library work
Parsing module <register_32b>.
Analyzing Verilog file "G:\program\xilinx\FPGA_Project\mux_32b_2b1.v" into library work
Parsing module <mux_32b_2b1>.
Analyzing Verilog file "G:\program\xilinx\FPGA_Project\instruction_memory.v" into library work
Parsing module <instruction_memory>.
Analyzing Verilog file "G:\program\xilinx\FPGA_Project\incrementer_32b.v" into library work
Parsing module <incrementer_32b>.
Analyzing Verilog file "G:\program\xilinx\FPGA_Project\data_memory.v" into library work
Parsing module <data_memory>.
Analyzing Verilog file "G:\program\xilinx\FPGA_Project\ALU_32b.v" into library work
Parsing module <ALU_32b>.
Analyzing Verilog file "C:/Users/Ahmadreza/Desktop/Project/Control.v" into library work
Parsing module <Control>.
Analyzing Verilog file "C:/Users/Ahmadreza/Desktop/Project/ALU_control.v" into library work
Parsing module <ALU_control>.
Analyzing Verilog file "G:\program\xilinx\FPGA_Project\mips.v" into library work
Parsing module <mips>.

=========================================================================
*                            HDL Elaboration                            *
=========================================================================

Elaborating module <mips>.
"G:\program\xilinx\FPGA_Project\mips.v" Line 29. $display Program counter Output : 0
"G:\program\xilinx\FPGA_Project\mips.v" Line 30. $display instruction : 32'b................................
"G:\program\xilinx\FPGA_Project\mips.v" Line 31. $display Program Counter next input : 0
"G:\program\xilinx\FPGA_Project\mips.v" Line 32. $display Sign Extend Output : 32'b................................
"G:\program\xilinx\FPGA_Project\mips.v" Line 33. $display PC Incrementer Output : 32'b................................
"G:\program\xilinx\FPGA_Project\mips.v" Line 34. $display ALU Add : 32'b................................
"G:\program\xilinx\FPGA_Project\mips.v" Line 35. $display ALU RegWrite :  1'b.
"G:\program\xilinx\FPGA_Project\mips.v" Line 36. $display Register Bank First Read Input : 5'b.....
"G:\program\xilinx\FPGA_Project\mips.v" Line 37. $display Register Bank Second Read Input : 5'b.....
"G:\program\xilinx\FPGA_Project\mips.v" Line 38. $display Register Bank First Output : 32'b................................
"G:\program\xilinx\FPGA_Project\mips.v" Line 39. $display Register Bank Second Output : 32'b................................
"G:\program\xilinx\FPGA_Project\mips.v" Line 40. $display ALU Result : 0
"G:\program\xilinx\FPGA_Project\mips.v" Line 41. $display MemtoReg : 0
"G:\program\xilinx\FPGA_Project\mips.v" Line 42. $display DM mux output (write data for RB) : 0
"G:\program\xilinx\FPGA_Project\mips.v" Line 43. $display --------------------------------------------------------
"G:\program\xilinx\FPGA_Project\mips.v" Line 44. $display --------------------------------------------------------

Elaborating module <register_32b>.

Elaborating module <instruction_memory>.

Elaborating module <Control>.

Elaborating module <sign_extend>.

Elaborating module <incrementer_32b>.

Elaborating module <mux_32b_2b1>.

Elaborating module <register_bank>.
WARNING:HDLCompiler:413 - "G:\program\xilinx\FPGA_Project\mips.v" Line 141: Result of 32-bit expression is truncated to fit in 1-bit target.
WARNING:HDLCompiler:1127 - "G:\program\xilinx\FPGA_Project\mips.v" Line 141: Assignment to wire_RB_read1 ignored, since the identifier is never used
WARNING:HDLCompiler:413 - "G:\program\xilinx\FPGA_Project\mips.v" Line 142: Result of 32-bit expression is truncated to fit in 1-bit target.
WARNING:HDLCompiler:1127 - "G:\program\xilinx\FPGA_Project\mips.v" Line 142: Assignment to wire_RB_read2 ignored, since the identifier is never used

Elaborating module <ALU_32b>.
WARNING:HDLCompiler:413 - "G:\program\xilinx\FPGA_Project\mips.v" Line 153: Result of 32-bit expression is truncated to fit in 1-bit target.
WARNING:HDLCompiler:1127 - "G:\program\xilinx\FPGA_Project\mips.v" Line 153: Assignment to wire_ALU_Result ignored, since the identifier is never used

Elaborating module <ALU_control>.

Elaborating module <data_memory>.

=========================================================================
*                           HDL Synthesis                               *
=========================================================================

Synthesizing Unit <mips>.
    Related source file is "G:\program\xilinx\FPGA_Project\mips.v".
    Found 32-bit adder for signal <ALU_add> created at line 118.
    Summary:
	inferred   1 Adder/Subtractor(s).
	inferred   1 Multiplexer(s).
Unit <mips> synthesized.

Synthesizing Unit <register_32b>.
    Related source file is "G:\program\xilinx\FPGA_Project\register_32b.v".
    Found 32-bit register for signal <data>.
    Summary:
	inferred  32 D-type flip-flop(s).
Unit <register_32b> synthesized.

Synthesizing Unit <instruction_memory>.
    Related source file is "G:\program\xilinx\FPGA_Project\instruction_memory.v".
WARNING:Xst:2999 - Signal 'memory', unconnected in block 'instruction_memory', is tied to its initial value.
    Found 32x32-bit single-port Read Only RAM <Mram_memory> for signal <memory>.
    Summary:
	inferred   1 RAM(s).
Unit <instruction_memory> synthesized.

Synthesizing Unit <Control>.
    Related source file is "C:/Users/Ahmadreza/Desktop/Project/Control.v".
WARNING:Xst:737 - Found 1-bit latch for signal <RegDst>. Latches may be generated from incomplete case or if statements. We do not recommend the use of latches in FPGA/CPLD designs, as they may lead to timing problems.
WARNING:Xst:737 - Found 1-bit latch for signal <ALUsrc>. Latches may be generated from incomplete case or if statements. We do not recommend the use of latches in FPGA/CPLD designs, as they may lead to timing problems.
WARNING:Xst:737 - Found 1-bit latch for signal <MemtoReg>. Latches may be generated from incomplete case or if statements. We do not recommend the use of latches in FPGA/CPLD designs, as they may lead to timing problems.
WARNING:Xst:737 - Found 1-bit latch for signal <RegWrite>. Latches may be generated from incomplete case or if statements. We do not recommend the use of latches in FPGA/CPLD designs, as they may lead to timing problems.
WARNING:Xst:737 - Found 1-bit latch for signal <Branch>. Latches may be generated from incomplete case or if statements. We do not recommend the use of latches in FPGA/CPLD designs, as they may lead to timing problems.
WARNING:Xst:737 - Found 1-bit latch for signal <ALUop<1>>. Latches may be generated from incomplete case or if statements. We do not recommend the use of latches in FPGA/CPLD designs, as they may lead to timing problems.
    Summary:
	inferred   6 Latch(s).
	inferred  13 Multiplexer(s).
Unit <Control> synthesized.

Synthesizing Unit <sign_extend>.
    Related source file is "G:\program\xilinx\FPGA_Project\sign_extend.v".
    Summary:
	no macro.
Unit <sign_extend> synthesized.

Synthesizing Unit <incrementer_32b>.
    Related source file is "G:\program\xilinx\FPGA_Project\incrementer_32b.v".
    Found 32-bit adder for signal <data_out> created at line 26.
    Summary:
	inferred   1 Adder/Subtractor(s).
Unit <incrementer_32b> synthesized.

Synthesizing Unit <mux_32b_2b1>.
    Related source file is "G:\program\xilinx\FPGA_Project\mux_32b_2b1.v".
    Summary:
	inferred   1 Multiplexer(s).
Unit <mux_32b_2b1> synthesized.

Synthesizing Unit <register_bank>.
    Related source file is "G:\program\xilinx\FPGA_Project\register_bank.v".
    Found 1-bit register for signal <data_reg<0><30>>.
    Found 1-bit register for signal <data_reg<0><29>>.
    Found 1-bit register for signal <data_reg<0><28>>.
    Found 1-bit register for signal <data_reg<0><27>>.
    Found 1-bit register for signal <data_reg<0><26>>.
    Found 1-bit register for signal <data_reg<0><25>>.
    Found 1-bit register for signal <data_reg<0><24>>.
    Found 1-bit register for signal <data_reg<0><23>>.
    Found 1-bit register for signal <data_reg<0><22>>.
    Found 1-bit register for signal <data_reg<0><21>>.
    Found 1-bit register for signal <data_reg<0><20>>.
    Found 1-bit register for signal <data_reg<0><19>>.
    Found 1-bit register for signal <data_reg<0><18>>.
    Found 1-bit register for signal <data_reg<0><17>>.
    Found 1-bit register for signal <data_reg<0><16>>.
    Found 1-bit register for signal <data_reg<0><15>>.
    Found 1-bit register for signal <data_reg<0><14>>.
    Found 1-bit register for signal <data_reg<0><13>>.
    Found 1-bit register for signal <data_reg<0><12>>.
    Found 1-bit register for signal <data_reg<0><11>>.
    Found 1-bit register for signal <data_reg<0><10>>.
    Found 1-bit register for signal <data_reg<0><9>>.
    Found 1-bit register for signal <data_reg<0><8>>.
    Found 1-bit register for signal <data_reg<0><7>>.
    Found 1-bit register for signal <data_reg<0><6>>.
    Found 1-bit register for signal <data_reg<0><5>>.
    Found 1-bit register for signal <data_reg<0><4>>.
    Found 1-bit register for signal <data_reg<0><3>>.
    Found 1-bit register for signal <data_reg<0><2>>.
    Found 1-bit register for signal <data_reg<0><1>>.
    Found 1-bit register for signal <data_reg<0><0>>.
    Found 1-bit register for signal <data_reg<1><31>>.
    Found 1-bit register for signal <data_reg<1><30>>.
    Found 1-bit register for signal <data_reg<1><29>>.
    Found 1-bit register for signal <data_reg<1><28>>.
    Found 1-bit register for signal <data_reg<1><27>>.
    Found 1-bit register for signal <data_reg<1><26>>.
    Found 1-bit register for signal <data_reg<1><25>>.
    Found 1-bit register for signal <data_reg<1><24>>.
    Found 1-bit register for signal <data_reg<1><23>>.
    Found 1-bit register for signal <data_reg<1><22>>.
    Found 1-bit register for signal <data_reg<1><21>>.
    Found 1-bit register for signal <data_reg<1><20>>.
    Found 1-bit register for signal <data_reg<1><19>>.
    Found 1-bit register for signal <data_reg<1><18>>.
    Found 1-bit register for signal <data_reg<1><17>>.
    Found 1-bit register for signal <data_reg<1><16>>.
    Found 1-bit register for signal <data_reg<1><15>>.
    Found 1-bit register for signal <data_reg<1><14>>.
    Found 1-bit register for signal <data_reg<1><13>>.
    Found 1-bit register for signal <data_reg<1><12>>.
    Found 1-bit register for signal <data_reg<1><11>>.
    Found 1-bit register for signal <data_reg<1><10>>.
    Found 1-bit register for signal <data_reg<1><9>>.
    Found 1-bit register for signal <data_reg<1><8>>.
    Found 1-bit register for signal <data_reg<1><7>>.
    Found 1-bit register for signal <data_reg<1><6>>.
    Found 1-bit register for signal <data_reg<1><5>>.
    Found 1-bit register for signal <data_reg<1><4>>.
    Found 1-bit register for signal <data_reg<1><3>>.
    Found 1-bit register for signal <data_reg<1><2>>.
    Found 1-bit register for signal <data_reg<1><1>>.
    Found 1-bit register for signal <data_reg<1><0>>.
    Found 1-bit register for signal <data_reg<2><31>>.
    Found 1-bit register for signal <data_reg<2><30>>.
    Found 1-bit register for signal <data_reg<2><29>>.
    Found 1-bit register for signal <data_reg<2><28>>.
    Found 1-bit register for signal <data_reg<2><27>>.
    Found 1-bit register for signal <data_reg<2><26>>.
    Found 1-bit register for signal <data_reg<2><25>>.
    Found 1-bit register for signal <data_reg<2><24>>.
    Found 1-bit register for signal <data_reg<2><23>>.
    Found 1-bit register for signal <data_reg<2><22>>.
    Found 1-bit register for signal <data_reg<2><21>>.
    Found 1-bit register for signal <data_reg<2><20>>.
    Found 1-bit register for signal <data_reg<2><19>>.
    Found 1-bit register for signal <data_reg<2><18>>.
    Found 1-bit register for signal <data_reg<2><17>>.
    Found 1-bit register for signal <data_reg<2><16>>.
    Found 1-bit register for signal <data_reg<2><15>>.
    Found 1-bit register for signal <data_reg<2><14>>.
    Found 1-bit register for signal <data_reg<2><13>>.
    Found 1-bit register for signal <data_reg<2><12>>.
    Found 1-bit register for signal <data_reg<2><11>>.
    Found 1-bit register for signal <data_reg<2><10>>.
    Found 1-bit register for signal <data_reg<2><9>>.
    Found 1-bit register for signal <data_reg<2><8>>.
    Found 1-bit register for signal <data_reg<2><7>>.
    Found 1-bit register for signal <data_reg<2><6>>.
    Found 1-bit register for signal <data_reg<2><5>>.
    Found 1-bit register for signal <data_reg<2><4>>.
    Found 1-bit register for signal <data_reg<2><3>>.
    Found 1-bit register for signal <data_reg<2><2>>.
    Found 1-bit register for signal <data_reg<2><1>>.
    Found 1-bit register for signal <data_reg<2><0>>.
    Found 1-bit register for signal <data_reg<3><31>>.
    Found 1-bit register for signal <data_reg<3><30>>.
    Found 1-bit register for signal <data_reg<3><29>>.
    Found 1-bit register for signal <data_reg<3><28>>.
    Found 1-bit register for signal <data_reg<3><27>>.
    Found 1-bit register for signal <data_reg<3><26>>.
    Found 1-bit register for signal <data_reg<3><25>>.
    Found 1-bit register for signal <data_reg<3><24>>.
    Found 1-bit register for signal <data_reg<3><23>>.
    Found 1-bit register for signal <data_reg<3><22>>.
    Found 1-bit register for signal <data_reg<3><21>>.
    Found 1-bit register for signal <data_reg<3><20>>.
    Found 1-bit register for signal <data_reg<3><19>>.
    Found 1-bit register for signal <data_reg<3><18>>.
    Found 1-bit register for signal <data_reg<3><17>>.
    Found 1-bit register for signal <data_reg<3><16>>.
    Found 1-bit register for signal <data_reg<3><15>>.
    Found 1-bit register for signal <data_reg<3><14>>.
    Found 1-bit register for signal <data_reg<3><13>>.
    Found 1-bit register for signal <data_reg<3><12>>.
    Found 1-bit register for signal <data_reg<3><11>>.
    Found 1-bit register for signal <data_reg<3><10>>.
    Found 1-bit register for signal <data_reg<3><9>>.
    Found 1-bit register for signal <data_reg<3><8>>.
    Found 1-bit register for signal <data_reg<3><7>>.
    Found 1-bit register for signal <data_reg<3><6>>.
    Found 1-bit register for signal <data_reg<3><5>>.
    Found 1-bit register for signal <data_reg<3><4>>.
    Found 1-bit register for signal <data_reg<3><3>>.
    Found 1-bit register for signal <data_reg<3><2>>.
    Found 1-bit register for signal <data_reg<3><1>>.
    Found 1-bit register for signal <data_reg<3><0>>.
    Found 1-bit register for signal <data_reg<4><31>>.
    Found 1-bit register for signal <data_reg<4><30>>.
    Found 1-bit register for signal <data_reg<4><29>>.
    Found 1-bit register for signal <data_reg<4><28>>.
    Found 1-bit register for signal <data_reg<4><27>>.
    Found 1-bit register for signal <data_reg<4><26>>.
    Found 1-bit register for signal <data_reg<4><25>>.
    Found 1-bit register for signal <data_reg<4><24>>.
    Found 1-bit register for signal <data_reg<4><23>>.
    Found 1-bit register for signal <data_reg<4><22>>.
    Found 1-bit register for signal <data_reg<4><21>>.
    Found 1-bit register for signal <data_reg<4><20>>.
    Found 1-bit register for signal <data_reg<4><19>>.
    Found 1-bit register for signal <data_reg<4><18>>.
    Found 1-bit register for signal <data_reg<4><17>>.
    Found 1-bit register for signal <data_reg<4><16>>.
    Found 1-bit register for signal <data_reg<4><15>>.
    Found 1-bit register for signal <data_reg<4><14>>.
    Found 1-bit register for signal <data_reg<4><13>>.
    Found 1-bit register for signal <data_reg<4><12>>.
    Found 1-bit register for signal <data_reg<4><11>>.
    Found 1-bit register for signal <data_reg<4><10>>.
    Found 1-bit register for signal <data_reg<4><9>>.
    Found 1-bit register for signal <data_reg<4><8>>.
    Found 1-bit register for signal <data_reg<4><7>>.
    Found 1-bit register for signal <data_reg<4><6>>.
    Found 1-bit register for signal <data_reg<4><5>>.
    Found 1-bit register for signal <data_reg<4><4>>.
    Found 1-bit register for signal <data_reg<4><3>>.
    Found 1-bit register for signal <data_reg<4><2>>.
    Found 1-bit register for signal <data_reg<4><1>>.
    Found 1-bit register for signal <data_reg<4><0>>.
    Found 1-bit register for signal <data_reg<5><31>>.
    Found 1-bit register for signal <data_reg<5><30>>.
    Found 1-bit register for signal <data_reg<5><29>>.
    Found 1-bit register for signal <data_reg<5><28>>.
    Found 1-bit register for signal <data_reg<5><27>>.
    Found 1-bit register for signal <data_reg<5><26>>.
    Found 1-bit register for signal <data_reg<5><25>>.
    Found 1-bit register for signal <data_reg<5><24>>.
    Found 1-bit register for signal <data_reg<5><23>>.
    Found 1-bit register for signal <data_reg<5><22>>.
    Found 1-bit register for signal <data_reg<5><21>>.
    Found 1-bit register for signal <data_reg<5><20>>.
    Found 1-bit register for signal <data_reg<5><19>>.
    Found 1-bit register for signal <data_reg<5><18>>.
    Found 1-bit register for signal <data_reg<5><17>>.
    Found 1-bit register for signal <data_reg<5><16>>.
    Found 1-bit register for signal <data_reg<5><15>>.
    Found 1-bit register for signal <data_reg<5><14>>.
    Found 1-bit register for signal <data_reg<5><13>>.
    Found 1-bit register for signal <data_reg<5><12>>.
    Found 1-bit register for signal <data_reg<5><11>>.
    Found 1-bit register for signal <data_reg<5><10>>.
    Found 1-bit register for signal <data_reg<5><9>>.
    Found 1-bit register for signal <data_reg<5><8>>.
    Found 1-bit register for signal <data_reg<5><7>>.
    Found 1-bit register for signal <data_reg<5><6>>.
    Found 1-bit register for signal <data_reg<5><5>>.
    Found 1-bit register for signal <data_reg<5><4>>.
    Found 1-bit register for signal <data_reg<5><3>>.
    Found 1-bit register for signal <data_reg<5><2>>.
    Found 1-bit register for signal <data_reg<5><1>>.
    Found 1-bit register for signal <data_reg<5><0>>.
    Found 1-bit register for signal <data_reg<6><31>>.
    Found 1-bit register for signal <data_reg<6><30>>.
    Found 1-bit register for signal <data_reg<6><29>>.
    Found 1-bit register for signal <data_reg<6><28>>.
    Found 1-bit register for signal <data_reg<6><27>>.
    Found 1-bit register for signal <data_reg<6><26>>.
    Found 1-bit register for signal <data_reg<6><25>>.
    Found 1-bit register for signal <data_reg<6><24>>.
    Found 1-bit register for signal <data_reg<6><23>>.
    Found 1-bit register for signal <data_reg<6><22>>.
    Found 1-bit register for signal <data_reg<6><21>>.
    Found 1-bit register for signal <data_reg<6><20>>.
    Found 1-bit register for signal <data_reg<6><19>>.
    Found 1-bit register for signal <data_reg<6><18>>.
    Found 1-bit register for signal <data_reg<6><17>>.
    Found 1-bit register for signal <data_reg<6><16>>.
    Found 1-bit register for signal <data_reg<6><15>>.
    Found 1-bit register for signal <data_reg<6><14>>.
    Found 1-bit register for signal <data_reg<6><13>>.
    Found 1-bit register for signal <data_reg<6><12>>.
    Found 1-bit register for signal <data_reg<6><11>>.
    Found 1-bit register for signal <data_reg<6><10>>.
    Found 1-bit register for signal <data_reg<6><9>>.
    Found 1-bit register for signal <data_reg<6><8>>.
    Found 1-bit register for signal <data_reg<6><7>>.
    Found 1-bit register for signal <data_reg<6><6>>.
    Found 1-bit register for signal <data_reg<6><5>>.
    Found 1-bit register for signal <data_reg<6><4>>.
    Found 1-bit register for signal <data_reg<6><3>>.
    Found 1-bit register for signal <data_reg<6><2>>.
    Found 1-bit register for signal <data_reg<6><1>>.
    Found 1-bit register for signal <data_reg<6><0>>.
    Found 1-bit register for signal <data_reg<7><31>>.
    Found 1-bit register for signal <data_reg<7><30>>.
    Found 1-bit register for signal <data_reg<7><29>>.
    Found 1-bit register for signal <data_reg<7><28>>.
    Found 1-bit register for signal <data_reg<7><27>>.
    Found 1-bit register for signal <data_reg<7><26>>.
    Found 1-bit register for signal <data_reg<7><25>>.
    Found 1-bit register for signal <data_reg<7><24>>.
    Found 1-bit register for signal <data_reg<7><23>>.
    Found 1-bit register for signal <data_reg<7><22>>.
    Found 1-bit register for signal <data_reg<7><21>>.
    Found 1-bit register for signal <data_reg<7><20>>.
    Found 1-bit register for signal <data_reg<7><19>>.
    Found 1-bit register for signal <data_reg<7><18>>.
    Found 1-bit register for signal <data_reg<7><17>>.
    Found 1-bit register for signal <data_reg<7><16>>.
    Found 1-bit register for signal <data_reg<7><15>>.
    Found 1-bit register for signal <data_reg<7><14>>.
    Found 1-bit register for signal <data_reg<7><13>>.
    Found 1-bit register for signal <data_reg<7><12>>.
    Found 1-bit register for signal <data_reg<7><11>>.
    Found 1-bit register for signal <data_reg<7><10>>.
    Found 1-bit register for signal <data_reg<7><9>>.
    Found 1-bit register for signal <data_reg<7><8>>.
    Found 1-bit register for signal <data_reg<7><7>>.
    Found 1-bit register for signal <data_reg<7><6>>.
    Found 1-bit register for signal <data_reg<7><5>>.
    Found 1-bit register for signal <data_reg<7><4>>.
    Found 1-bit register for signal <data_reg<7><3>>.
    Found 1-bit register for signal <data_reg<7><2>>.
    Found 1-bit register for signal <data_reg<7><1>>.
    Found 1-bit register for signal <data_reg<7><0>>.
    Found 1-bit register for signal <data_reg<8><31>>.
    Found 1-bit register for signal <data_reg<8><30>>.
    Found 1-bit register for signal <data_reg<8><29>>.
    Found 1-bit register for signal <data_reg<8><28>>.
    Found 1-bit register for signal <data_reg<8><27>>.
    Found 1-bit register for signal <data_reg<8><26>>.
    Found 1-bit register for signal <data_reg<8><25>>.
    Found 1-bit register for signal <data_reg<8><24>>.
    Found 1-bit register for signal <data_reg<8><23>>.
    Found 1-bit register for signal <data_reg<8><22>>.
    Found 1-bit register for signal <data_reg<8><21>>.
    Found 1-bit register for signal <data_reg<8><20>>.
    Found 1-bit register for signal <data_reg<8><19>>.
    Found 1-bit register for signal <data_reg<8><18>>.
    Found 1-bit register for signal <data_reg<8><17>>.
    Found 1-bit register for signal <data_reg<8><16>>.
    Found 1-bit register for signal <data_reg<8><15>>.
    Found 1-bit register for signal <data_reg<8><14>>.
    Found 1-bit register for signal <data_reg<8><13>>.
    Found 1-bit register for signal <data_reg<8><12>>.
    Found 1-bit register for signal <data_reg<8><11>>.
    Found 1-bit register for signal <data_reg<8><10>>.
    Found 1-bit register for signal <data_reg<8><9>>.
    Found 1-bit register for signal <data_reg<8><8>>.
    Found 1-bit register for signal <data_reg<8><7>>.
    Found 1-bit register for signal <data_reg<8><6>>.
    Found 1-bit register for signal <data_reg<8><5>>.
    Found 1-bit register for signal <data_reg<8><4>>.
    Found 1-bit register for signal <data_reg<8><3>>.
    Found 1-bit register for signal <data_reg<8><2>>.
    Found 1-bit register for signal <data_reg<8><1>>.
    Found 1-bit register for signal <data_reg<8><0>>.
    Found 1-bit register for signal <data_reg<9><31>>.
    Found 1-bit register for signal <data_reg<9><30>>.
    Found 1-bit register for signal <data_reg<9><29>>.
    Found 1-bit register for signal <data_reg<9><28>>.
    Found 1-bit register for signal <data_reg<9><27>>.
    Found 1-bit register for signal <data_reg<9><26>>.
    Found 1-bit register for signal <data_reg<9><25>>.
    Found 1-bit register for signal <data_reg<9><24>>.
    Found 1-bit register for signal <data_reg<9><23>>.
    Found 1-bit register for signal <data_reg<9><22>>.
    Found 1-bit register for signal <data_reg<9><21>>.
    Found 1-bit register for signal <data_reg<9><20>>.
    Found 1-bit register for signal <data_reg<9><19>>.
    Found 1-bit register for signal <data_reg<9><18>>.
    Found 1-bit register for signal <data_reg<9><17>>.
    Found 1-bit register for signal <data_reg<9><16>>.
    Found 1-bit register for signal <data_reg<9><15>>.
    Found 1-bit register for signal <data_reg<9><14>>.
    Found 1-bit register for signal <data_reg<9><13>>.
    Found 1-bit register for signal <data_reg<9><12>>.
    Found 1-bit register for signal <data_reg<9><11>>.
    Found 1-bit register for signal <data_reg<9><10>>.
    Found 1-bit register for signal <data_reg<9><9>>.
    Found 1-bit register for signal <data_reg<9><8>>.
    Found 1-bit register for signal <data_reg<9><7>>.
    Found 1-bit register for signal <data_reg<9><6>>.
    Found 1-bit register for signal <data_reg<9><5>>.
    Found 1-bit register for signal <data_reg<9><4>>.
    Found 1-bit register for signal <data_reg<9><3>>.
    Found 1-bit register for signal <data_reg<9><2>>.
    Found 1-bit register for signal <data_reg<9><1>>.
    Found 1-bit register for signal <data_reg<9><0>>.
    Found 1-bit register for signal <data_reg<10><31>>.
    Found 1-bit register for signal <data_reg<10><30>>.
    Found 1-bit register for signal <data_reg<10><29>>.
    Found 1-bit register for signal <data_reg<10><28>>.
    Found 1-bit register for signal <data_reg<10><27>>.
    Found 1-bit register for signal <data_reg<10><26>>.
    Found 1-bit register for signal <data_reg<10><25>>.
    Found 1-bit register for signal <data_reg<10><24>>.
    Found 1-bit register for signal <data_reg<10><23>>.
    Found 1-bit register for signal <data_reg<10><22>>.
    Found 1-bit register for signal <data_reg<10><21>>.
    Found 1-bit register for signal <data_reg<10><20>>.
    Found 1-bit register for signal <data_reg<10><19>>.
    Found 1-bit register for signal <data_reg<10><18>>.
    Found 1-bit register for signal <data_reg<10><17>>.
    Found 1-bit register for signal <data_reg<10><16>>.
    Found 1-bit register for signal <data_reg<10><15>>.
    Found 1-bit register for signal <data_reg<10><14>>.
    Found 1-bit register for signal <data_reg<10><13>>.
    Found 1-bit register for signal <data_reg<10><12>>.
    Found 1-bit register for signal <data_reg<10><11>>.
    Found 1-bit register for signal <data_reg<10><10>>.
    Found 1-bit register for signal <data_reg<10><9>>.
    Found 1-bit register for signal <data_reg<10><8>>.
    Found 1-bit register for signal <data_reg<10><7>>.
    Found 1-bit register for signal <data_reg<10><6>>.
    Found 1-bit register for signal <data_reg<10><5>>.
    Found 1-bit register for signal <data_reg<10><4>>.
    Found 1-bit register for signal <data_reg<10><3>>.
    Found 1-bit register for signal <data_reg<10><2>>.
    Found 1-bit register for signal <data_reg<10><1>>.
    Found 1-bit register for signal <data_reg<10><0>>.
    Found 1-bit register for signal <data_reg<11><31>>.
    Found 1-bit register for signal <data_reg<11><30>>.
    Found 1-bit register for signal <data_reg<11><29>>.
    Found 1-bit register for signal <data_reg<11><28>>.
    Found 1-bit register for signal <data_reg<11><27>>.
    Found 1-bit register for signal <data_reg<11><26>>.
    Found 1-bit register for signal <data_reg<11><25>>.
    Found 1-bit register for signal <data_reg<11><24>>.
    Found 1-bit register for signal <data_reg<11><23>>.
    Found 1-bit register for signal <data_reg<11><22>>.
    Found 1-bit register for signal <data_reg<11><21>>.
    Found 1-bit register for signal <data_reg<11><20>>.
    Found 1-bit register for signal <data_reg<11><19>>.
    Found 1-bit register for signal <data_reg<11><18>>.
    Found 1-bit register for signal <data_reg<11><17>>.
    Found 1-bit register for signal <data_reg<11><16>>.
    Found 1-bit register for signal <data_reg<11><15>>.
    Found 1-bit register for signal <data_reg<11><14>>.
    Found 1-bit register for signal <data_reg<11><13>>.
    Found 1-bit register for signal <data_reg<11><12>>.
    Found 1-bit register for signal <data_reg<11><11>>.
    Found 1-bit register for signal <data_reg<11><10>>.
    Found 1-bit register for signal <data_reg<11><9>>.
    Found 1-bit register for signal <data_reg<11><8>>.
    Found 1-bit register for signal <data_reg<11><7>>.
    Found 1-bit register for signal <data_reg<11><6>>.
    Found 1-bit register for signal <data_reg<11><5>>.
    Found 1-bit register for signal <data_reg<11><4>>.
    Found 1-bit register for signal <data_reg<11><3>>.
    Found 1-bit register for signal <data_reg<11><2>>.
    Found 1-bit register for signal <data_reg<11><1>>.
    Found 1-bit register for signal <data_reg<11><0>>.
    Found 1-bit register for signal <data_reg<12><31>>.
    Found 1-bit register for signal <data_reg<12><30>>.
    Found 1-bit register for signal <data_reg<12><29>>.
    Found 1-bit register for signal <data_reg<12><28>>.
    Found 1-bit register for signal <data_reg<12><27>>.
    Found 1-bit register for signal <data_reg<12><26>>.
    Found 1-bit register for signal <data_reg<12><25>>.
    Found 1-bit register for signal <data_reg<12><24>>.
    Found 1-bit register for signal <data_reg<12><23>>.
    Found 1-bit register for signal <data_reg<12><22>>.
    Found 1-bit register for signal <data_reg<12><21>>.
    Found 1-bit register for signal <data_reg<12><20>>.
    Found 1-bit register for signal <data_reg<12><19>>.
    Found 1-bit register for signal <data_reg<12><18>>.
    Found 1-bit register for signal <data_reg<12><17>>.
    Found 1-bit register for signal <data_reg<12><16>>.
    Found 1-bit register for signal <data_reg<12><15>>.
    Found 1-bit register for signal <data_reg<12><14>>.
    Found 1-bit register for signal <data_reg<12><13>>.
    Found 1-bit register for signal <data_reg<12><12>>.
    Found 1-bit register for signal <data_reg<12><11>>.
    Found 1-bit register for signal <data_reg<12><10>>.
    Found 1-bit register for signal <data_reg<12><9>>.
    Found 1-bit register for signal <data_reg<12><8>>.
    Found 1-bit register for signal <data_reg<12><7>>.
    Found 1-bit register for signal <data_reg<12><6>>.
    Found 1-bit register for signal <data_reg<12><5>>.
    Found 1-bit register for signal <data_reg<12><4>>.
    Found 1-bit register for signal <data_reg<12><3>>.
    Found 1-bit register for signal <data_reg<12><2>>.
    Found 1-bit register for signal <data_reg<12><1>>.
    Found 1-bit register for signal <data_reg<12><0>>.
    Found 1-bit register for signal <data_reg<13><31>>.
    Found 1-bit register for signal <data_reg<13><30>>.
    Found 1-bit register for signal <data_reg<13><29>>.
    Found 1-bit register for signal <data_reg<13><28>>.
    Found 1-bit register for signal <data_reg<13><27>>.
    Found 1-bit register for signal <data_reg<13><26>>.
    Found 1-bit register for signal <data_reg<13><25>>.
    Found 1-bit register for signal <data_reg<13><24>>.
    Found 1-bit register for signal <data_reg<13><23>>.
    Found 1-bit register for signal <data_reg<13><22>>.
    Found 1-bit register for signal <data_reg<13><21>>.
    Found 1-bit register for signal <data_reg<13><20>>.
    Found 1-bit register for signal <data_reg<13><19>>.
    Found 1-bit register for signal <data_reg<13><18>>.
    Found 1-bit register for signal <data_reg<13><17>>.
    Found 1-bit register for signal <data_reg<13><16>>.
    Found 1-bit register for signal <data_reg<13><15>>.
    Found 1-bit register for signal <data_reg<13><14>>.
    Found 1-bit register for signal <data_reg<13><13>>.
    Found 1-bit register for signal <data_reg<13><12>>.
    Found 1-bit register for signal <data_reg<13><11>>.
    Found 1-bit register for signal <data_reg<13><10>>.
    Found 1-bit register for signal <data_reg<13><9>>.
    Found 1-bit register for signal <data_reg<13><8>>.
    Found 1-bit register for signal <data_reg<13><7>>.
    Found 1-bit register for signal <data_reg<13><6>>.
    Found 1-bit register for signal <data_reg<13><5>>.
    Found 1-bit register for signal <data_reg<13><4>>.
    Found 1-bit register for signal <data_reg<13><3>>.
    Found 1-bit register for signal <data_reg<13><2>>.
    Found 1-bit register for signal <data_reg<13><1>>.
    Found 1-bit register for signal <data_reg<13><0>>.
    Found 1-bit register for signal <data_reg<14><31>>.
    Found 1-bit register for signal <data_reg<14><30>>.
    Found 1-bit register for signal <data_reg<14><29>>.
    Found 1-bit register for signal <data_reg<14><28>>.
    Found 1-bit register for signal <data_reg<14><27>>.
    Found 1-bit register for signal <data_reg<14><26>>.
    Found 1-bit register for signal <data_reg<14><25>>.
    Found 1-bit register for signal <data_reg<14><24>>.
    Found 1-bit register for signal <data_reg<14><23>>.
    Found 1-bit register for signal <data_reg<14><22>>.
    Found 1-bit register for signal <data_reg<14><21>>.
    Found 1-bit register for signal <data_reg<14><20>>.
    Found 1-bit register for signal <data_reg<14><19>>.
    Found 1-bit register for signal <data_reg<14><18>>.
    Found 1-bit register for signal <data_reg<14><17>>.
    Found 1-bit register for signal <data_reg<14><16>>.
    Found 1-bit register for signal <data_reg<14><15>>.
    Found 1-bit register for signal <data_reg<14><14>>.
    Found 1-bit register for signal <data_reg<14><13>>.
    Found 1-bit register for signal <data_reg<14><12>>.
    Found 1-bit register for signal <data_reg<14><11>>.
    Found 1-bit register for signal <data_reg<14><10>>.
    Found 1-bit register for signal <data_reg<14><9>>.
    Found 1-bit register for signal <data_reg<14><8>>.
    Found 1-bit register for signal <data_reg<14><7>>.
    Found 1-bit register for signal <data_reg<14><6>>.
    Found 1-bit register for signal <data_reg<14><5>>.
    Found 1-bit register for signal <data_reg<14><4>>.
    Found 1-bit register for signal <data_reg<14><3>>.
    Found 1-bit register for signal <data_reg<14><2>>.
    Found 1-bit register for signal <data_reg<14><1>>.
    Found 1-bit register for signal <data_reg<14><0>>.
    Found 1-bit register for signal <data_reg<15><31>>.
    Found 1-bit register for signal <data_reg<15><30>>.
    Found 1-bit register for signal <data_reg<15><29>>.
    Found 1-bit register for signal <data_reg<15><28>>.
    Found 1-bit register for signal <data_reg<15><27>>.
    Found 1-bit register for signal <data_reg<15><26>>.
    Found 1-bit register for signal <data_reg<15><25>>.
    Found 1-bit register for signal <data_reg<15><24>>.
    Found 1-bit register for signal <data_reg<15><23>>.
    Found 1-bit register for signal <data_reg<15><22>>.
    Found 1-bit register for signal <data_reg<15><21>>.
    Found 1-bit register for signal <data_reg<15><20>>.
    Found 1-bit register for signal <data_reg<15><19>>.
    Found 1-bit register for signal <data_reg<15><18>>.
    Found 1-bit register for signal <data_reg<15><17>>.
    Found 1-bit register for signal <data_reg<15><16>>.
    Found 1-bit register for signal <data_reg<15><15>>.
    Found 1-bit register for signal <data_reg<15><14>>.
    Found 1-bit register for signal <data_reg<15><13>>.
    Found 1-bit register for signal <data_reg<15><12>>.
    Found 1-bit register for signal <data_reg<15><11>>.
    Found 1-bit register for signal <data_reg<15><10>>.
    Found 1-bit register for signal <data_reg<15><9>>.
    Found 1-bit register for signal <data_reg<15><8>>.
    Found 1-bit register for signal <data_reg<15><7>>.
    Found 1-bit register for signal <data_reg<15><6>>.
    Found 1-bit register for signal <data_reg<15><5>>.
    Found 1-bit register for signal <data_reg<15><4>>.
    Found 1-bit register for signal <data_reg<15><3>>.
    Found 1-bit register for signal <data_reg<15><2>>.
    Found 1-bit register for signal <data_reg<15><1>>.
    Found 1-bit register for signal <data_reg<15><0>>.
    Found 1-bit register for signal <data_reg<16><31>>.
    Found 1-bit register for signal <data_reg<16><30>>.
    Found 1-bit register for signal <data_reg<16><29>>.
    Found 1-bit register for signal <data_reg<16><28>>.
    Found 1-bit register for signal <data_reg<16><27>>.
    Found 1-bit register for signal <data_reg<16><26>>.
    Found 1-bit register for signal <data_reg<16><25>>.
    Found 1-bit register for signal <data_reg<16><24>>.
    Found 1-bit register for signal <data_reg<16><23>>.
    Found 1-bit register for signal <data_reg<16><22>>.
    Found 1-bit register for signal <data_reg<16><21>>.
    Found 1-bit register for signal <data_reg<16><20>>.
    Found 1-bit register for signal <data_reg<16><19>>.
    Found 1-bit register for signal <data_reg<16><18>>.
    Found 1-bit register for signal <data_reg<16><17>>.
    Found 1-bit register for signal <data_reg<16><16>>.
    Found 1-bit register for signal <data_reg<16><15>>.
    Found 1-bit register for signal <data_reg<16><14>>.
    Found 1-bit register for signal <data_reg<16><13>>.
    Found 1-bit register for signal <data_reg<16><12>>.
    Found 1-bit register for signal <data_reg<16><11>>.
    Found 1-bit register for signal <data_reg<16><10>>.
    Found 1-bit register for signal <data_reg<16><9>>.
    Found 1-bit register for signal <data_reg<16><8>>.
    Found 1-bit register for signal <data_reg<16><7>>.
    Found 1-bit register for signal <data_reg<16><6>>.
    Found 1-bit register for signal <data_reg<16><5>>.
    Found 1-bit register for signal <data_reg<16><4>>.
    Found 1-bit register for signal <data_reg<16><3>>.
    Found 1-bit register for signal <data_reg<16><2>>.
    Found 1-bit register for signal <data_reg<16><1>>.
    Found 1-bit register for signal <data_reg<16><0>>.
    Found 1-bit register for signal <data_reg<17><31>>.
    Found 1-bit register for signal <data_reg<17><30>>.
    Found 1-bit register for signal <data_reg<17><29>>.
    Found 1-bit register for signal <data_reg<17><28>>.
    Found 1-bit register for signal <data_reg<17><27>>.
    Found 1-bit register for signal <data_reg<17><26>>.
    Found 1-bit register for signal <data_reg<17><25>>.
    Found 1-bit register for signal <data_reg<17><24>>.
    Found 1-bit register for signal <data_reg<17><23>>.
    Found 1-bit register for signal <data_reg<17><22>>.
    Found 1-bit register for signal <data_reg<17><21>>.
    Found 1-bit register for signal <data_reg<17><20>>.
    Found 1-bit register for signal <data_reg<17><19>>.
    Found 1-bit register for signal <data_reg<17><18>>.
    Found 1-bit register for signal <data_reg<17><17>>.
    Found 1-bit register for signal <data_reg<17><16>>.
    Found 1-bit register for signal <data_reg<17><15>>.
    Found 1-bit register for signal <data_reg<17><14>>.
    Found 1-bit register for signal <data_reg<17><13>>.
    Found 1-bit register for signal <data_reg<17><12>>.
    Found 1-bit register for signal <data_reg<17><11>>.
    Found 1-bit register for signal <data_reg<17><10>>.
    Found 1-bit register for signal <data_reg<17><9>>.
    Found 1-bit register for signal <data_reg<17><8>>.
    Found 1-bit register for signal <data_reg<17><7>>.
    Found 1-bit register for signal <data_reg<17><6>>.
    Found 1-bit register for signal <data_reg<17><5>>.
    Found 1-bit register for signal <data_reg<17><4>>.
    Found 1-bit register for signal <data_reg<17><3>>.
    Found 1-bit register for signal <data_reg<17><2>>.
    Found 1-bit register for signal <data_reg<17><1>>.
    Found 1-bit register for signal <data_reg<17><0>>.
    Found 1-bit register for signal <data_reg<18><31>>.
    Found 1-bit register for signal <data_reg<18><30>>.
    Found 1-bit register for signal <data_reg<18><29>>.
    Found 1-bit register for signal <data_reg<18><28>>.
    Found 1-bit register for signal <data_reg<18><27>>.
    Found 1-bit register for signal <data_reg<18><26>>.
    Found 1-bit register for signal <data_reg<18><25>>.
    Found 1-bit register for signal <data_reg<18><24>>.
    Found 1-bit register for signal <data_reg<18><23>>.
    Found 1-bit register for signal <data_reg<18><22>>.
    Found 1-bit register for signal <data_reg<18><21>>.
    Found 1-bit register for signal <data_reg<18><20>>.
    Found 1-bit register for signal <data_reg<18><19>>.
    Found 1-bit register for signal <data_reg<18><18>>.
    Found 1-bit register for signal <data_reg<18><17>>.
    Found 1-bit register for signal <data_reg<18><16>>.
    Found 1-bit register for signal <data_reg<18><15>>.
    Found 1-bit register for signal <data_reg<18><14>>.
    Found 1-bit register for signal <data_reg<18><13>>.
    Found 1-bit register for signal <data_reg<18><12>>.
    Found 1-bit register for signal <data_reg<18><11>>.
    Found 1-bit register for signal <data_reg<18><10>>.
    Found 1-bit register for signal <data_reg<18><9>>.
    Found 1-bit register for signal <data_reg<18><8>>.
    Found 1-bit register for signal <data_reg<18><7>>.
    Found 1-bit register for signal <data_reg<18><6>>.
    Found 1-bit register for signal <data_reg<18><5>>.
    Found 1-bit register for signal <data_reg<18><4>>.
    Found 1-bit register for signal <data_reg<18><3>>.
    Found 1-bit register for signal <data_reg<18><2>>.
    Found 1-bit register for signal <data_reg<18><1>>.
    Found 1-bit register for signal <data_reg<18><0>>.
    Found 1-bit register for signal <data_reg<19><31>>.
    Found 1-bit register for signal <data_reg<19><30>>.
    Found 1-bit register for signal <data_reg<19><29>>.
    Found 1-bit register for signal <data_reg<19><28>>.
    Found 1-bit register for signal <data_reg<19><27>>.
    Found 1-bit register for signal <data_reg<19><26>>.
    Found 1-bit register for signal <data_reg<19><25>>.
    Found 1-bit register for signal <data_reg<19><24>>.
    Found 1-bit register for signal <data_reg<19><23>>.
    Found 1-bit register for signal <data_reg<19><22>>.
    Found 1-bit register for signal <data_reg<19><21>>.
    Found 1-bit register for signal <data_reg<19><20>>.
    Found 1-bit register for signal <data_reg<19><19>>.
    Found 1-bit register for signal <data_reg<19><18>>.
    Found 1-bit register for signal <data_reg<19><17>>.
    Found 1-bit register for signal <data_reg<19><16>>.
    Found 1-bit register for signal <data_reg<19><15>>.
    Found 1-bit register for signal <data_reg<19><14>>.
    Found 1-bit register for signal <data_reg<19><13>>.
    Found 1-bit register for signal <data_reg<19><12>>.
    Found 1-bit register for signal <data_reg<19><11>>.
    Found 1-bit register for signal <data_reg<19><10>>.
    Found 1-bit register for signal <data_reg<19><9>>.
    Found 1-bit register for signal <data_reg<19><8>>.
    Found 1-bit register for signal <data_reg<19><7>>.
    Found 1-bit register for signal <data_reg<19><6>>.
    Found 1-bit register for signal <data_reg<19><5>>.
    Found 1-bit register for signal <data_reg<19><4>>.
    Found 1-bit register for signal <data_reg<19><3>>.
    Found 1-bit register for signal <data_reg<19><2>>.
    Found 1-bit register for signal <data_reg<19><1>>.
    Found 1-bit register for signal <data_reg<19><0>>.
    Found 1-bit register for signal <data_reg<20><31>>.
    Found 1-bit register for signal <data_reg<20><30>>.
    Found 1-bit register for signal <data_reg<20><29>>.
    Found 1-bit register for signal <data_reg<20><28>>.
    Found 1-bit register for signal <data_reg<20><27>>.
    Found 1-bit register for signal <data_reg<20><26>>.
    Found 1-bit register for signal <data_reg<20><25>>.
    Found 1-bit register for signal <data_reg<20><24>>.
    Found 1-bit register for signal <data_reg<20><23>>.
    Found 1-bit register for signal <data_reg<20><22>>.
    Found 1-bit register for signal <data_reg<20><21>>.
    Found 1-bit register for signal <data_reg<20><20>>.
    Found 1-bit register for signal <data_reg<20><19>>.
    Found 1-bit register for signal <data_reg<20><18>>.
    Found 1-bit register for signal <data_reg<20><17>>.
    Found 1-bit register for signal <data_reg<20><16>>.
    Found 1-bit register for signal <data_reg<20><15>>.
    Found 1-bit register for signal <data_reg<20><14>>.
    Found 1-bit register for signal <data_reg<20><13>>.
    Found 1-bit register for signal <data_reg<20><12>>.
    Found 1-bit register for signal <data_reg<20><11>>.
    Found 1-bit register for signal <data_reg<20><10>>.
    Found 1-bit register for signal <data_reg<20><9>>.
    Found 1-bit register for signal <data_reg<20><8>>.
    Found 1-bit register for signal <data_reg<20><7>>.
    Found 1-bit register for signal <data_reg<20><6>>.
    Found 1-bit register for signal <data_reg<20><5>>.
    Found 1-bit register for signal <data_reg<20><4>>.
    Found 1-bit register for signal <data_reg<20><3>>.
    Found 1-bit register for signal <data_reg<20><2>>.
    Found 1-bit register for signal <data_reg<20><1>>.
    Found 1-bit register for signal <data_reg<20><0>>.
    Found 1-bit register for signal <data_reg<21><31>>.
    Found 1-bit register for signal <data_reg<21><30>>.
    Found 1-bit register for signal <data_reg<21><29>>.
    Found 1-bit register for signal <data_reg<21><28>>.
    Found 1-bit register for signal <data_reg<21><27>>.
    Found 1-bit register for signal <data_reg<21><26>>.
    Found 1-bit register for signal <data_reg<21><25>>.
    Found 1-bit register for signal <data_reg<21><24>>.
    Found 1-bit register for signal <data_reg<21><23>>.
    Found 1-bit register for signal <data_reg<21><22>>.
    Found 1-bit register for signal <data_reg<21><21>>.
    Found 1-bit register for signal <data_reg<21><20>>.
    Found 1-bit register for signal <data_reg<21><19>>.
    Found 1-bit register for signal <data_reg<21><18>>.
    Found 1-bit register for signal <data_reg<21><17>>.
    Found 1-bit register for signal <data_reg<21><16>>.
    Found 1-bit register for signal <data_reg<21><15>>.
    Found 1-bit register for signal <data_reg<21><14>>.
    Found 1-bit register for signal <data_reg<21><13>>.
    Found 1-bit register for signal <data_reg<21><12>>.
    Found 1-bit register for signal <data_reg<21><11>>.
    Found 1-bit register for signal <data_reg<21><10>>.
    Found 1-bit register for signal <data_reg<21><9>>.
    Found 1-bit register for signal <data_reg<21><8>>.
    Found 1-bit register for signal <data_reg<21><7>>.
    Found 1-bit register for signal <data_reg<21><6>>.
    Found 1-bit register for signal <data_reg<21><5>>.
    Found 1-bit register for signal <data_reg<21><4>>.
    Found 1-bit register for signal <data_reg<21><3>>.
    Found 1-bit register for signal <data_reg<21><2>>.
    Found 1-bit register for signal <data_reg<21><1>>.
    Found 1-bit register for signal <data_reg<21><0>>.
    Found 1-bit register for signal <data_reg<22><31>>.
    Found 1-bit register for signal <data_reg<22><30>>.
    Found 1-bit register for signal <data_reg<22><29>>.
    Found 1-bit register for signal <data_reg<22><28>>.
    Found 1-bit register for signal <data_reg<22><27>>.
    Found 1-bit register for signal <data_reg<22><26>>.
    Found 1-bit register for signal <data_reg<22><25>>.
    Found 1-bit register for signal <data_reg<22><24>>.
    Found 1-bit register for signal <data_reg<22><23>>.
    Found 1-bit register for signal <data_reg<22><22>>.
    Found 1-bit register for signal <data_reg<22><21>>.
    Found 1-bit register for signal <data_reg<22><20>>.
    Found 1-bit register for signal <data_reg<22><19>>.
    Found 1-bit register for signal <data_reg<22><18>>.
    Found 1-bit register for signal <data_reg<22><17>>.
    Found 1-bit register for signal <data_reg<22><16>>.
    Found 1-bit register for signal <data_reg<22><15>>.
    Found 1-bit register for signal <data_reg<22><14>>.
    Found 1-bit register for signal <data_reg<22><13>>.
    Found 1-bit register for signal <data_reg<22><12>>.
    Found 1-bit register for signal <data_reg<22><11>>.
    Found 1-bit register for signal <data_reg<22><10>>.
    Found 1-bit register for signal <data_reg<22><9>>.
    Found 1-bit register for signal <data_reg<22><8>>.
    Found 1-bit register for signal <data_reg<22><7>>.
    Found 1-bit register for signal <data_reg<22><6>>.
    Found 1-bit register for signal <data_reg<22><5>>.
    Found 1-bit register for signal <data_reg<22><4>>.
    Found 1-bit register for signal <data_reg<22><3>>.
    Found 1-bit register for signal <data_reg<22><2>>.
    Found 1-bit register for signal <data_reg<22><1>>.
    Found 1-bit register for signal <data_reg<22><0>>.
    Found 1-bit register for signal <data_reg<23><31>>.
    Found 1-bit register for signal <data_reg<23><30>>.
    Found 1-bit register for signal <data_reg<23><29>>.
    Found 1-bit register for signal <data_reg<23><28>>.
    Found 1-bit register for signal <data_reg<23><27>>.
    Found 1-bit register for signal <data_reg<23><26>>.
    Found 1-bit register for signal <data_reg<23><25>>.
    Found 1-bit register for signal <data_reg<23><24>>.
    Found 1-bit register for signal <data_reg<23><23>>.
    Found 1-bit register for signal <data_reg<23><22>>.
    Found 1-bit register for signal <data_reg<23><21>>.
    Found 1-bit register for signal <data_reg<23><20>>.
    Found 1-bit register for signal <data_reg<23><19>>.
    Found 1-bit register for signal <data_reg<23><18>>.
    Found 1-bit register for signal <data_reg<23><17>>.
    Found 1-bit register for signal <data_reg<23><16>>.
    Found 1-bit register for signal <data_reg<23><15>>.
    Found 1-bit register for signal <data_reg<23><14>>.
    Found 1-bit register for signal <data_reg<23><13>>.
    Found 1-bit register for signal <data_reg<23><12>>.
    Found 1-bit register for signal <data_reg<23><11>>.
    Found 1-bit register for signal <data_reg<23><10>>.
    Found 1-bit register for signal <data_reg<23><9>>.
    Found 1-bit register for signal <data_reg<23><8>>.
    Found 1-bit register for signal <data_reg<23><7>>.
    Found 1-bit register for signal <data_reg<23><6>>.
    Found 1-bit register for signal <data_reg<23><5>>.
    Found 1-bit register for signal <data_reg<23><4>>.
    Found 1-bit register for signal <data_reg<23><3>>.
    Found 1-bit register for signal <data_reg<23><2>>.
    Found 1-bit register for signal <data_reg<23><1>>.
    Found 1-bit register for signal <data_reg<23><0>>.
    Found 1-bit register for signal <data_reg<24><31>>.
    Found 1-bit register for signal <data_reg<24><30>>.
    Found 1-bit register for signal <data_reg<24><29>>.
    Found 1-bit register for signal <data_reg<24><28>>.
    Found 1-bit register for signal <data_reg<24><27>>.
    Found 1-bit register for signal <data_reg<24><26>>.
    Found 1-bit register for signal <data_reg<24><25>>.
    Found 1-bit register for signal <data_reg<24><24>>.
    Found 1-bit register for signal <data_reg<24><23>>.
    Found 1-bit register for signal <data_reg<24><22>>.
    Found 1-bit register for signal <data_reg<24><21>>.
    Found 1-bit register for signal <data_reg<24><20>>.
    Found 1-bit register for signal <data_reg<24><19>>.
    Found 1-bit register for signal <data_reg<24><18>>.
    Found 1-bit register for signal <data_reg<24><17>>.
    Found 1-bit register for signal <data_reg<24><16>>.
    Found 1-bit register for signal <data_reg<24><15>>.
    Found 1-bit register for signal <data_reg<24><14>>.
    Found 1-bit register for signal <data_reg<24><13>>.
    Found 1-bit register for signal <data_reg<24><12>>.
    Found 1-bit register for signal <data_reg<24><11>>.
    Found 1-bit register for signal <data_reg<24><10>>.
    Found 1-bit register for signal <data_reg<24><9>>.
    Found 1-bit register for signal <data_reg<24><8>>.
    Found 1-bit register for signal <data_reg<24><7>>.
    Found 1-bit register for signal <data_reg<24><6>>.
    Found 1-bit register for signal <data_reg<24><5>>.
    Found 1-bit register for signal <data_reg<24><4>>.
    Found 1-bit register for signal <data_reg<24><3>>.
    Found 1-bit register for signal <data_reg<24><2>>.
    Found 1-bit register for signal <data_reg<24><1>>.
    Found 1-bit register for signal <data_reg<24><0>>.
    Found 1-bit register for signal <data_reg<25><31>>.
    Found 1-bit register for signal <data_reg<25><30>>.
    Found 1-bit register for signal <data_reg<25><29>>.
    Found 1-bit register for signal <data_reg<25><28>>.
    Found 1-bit register for signal <data_reg<25><27>>.
    Found 1-bit register for signal <data_reg<25><26>>.
    Found 1-bit register for signal <data_reg<25><25>>.
    Found 1-bit register for signal <data_reg<25><24>>.
    Found 1-bit register for signal <data_reg<25><23>>.
    Found 1-bit register for signal <data_reg<25><22>>.
    Found 1-bit register for signal <data_reg<25><21>>.
    Found 1-bit register for signal <data_reg<25><20>>.
    Found 1-bit register for signal <data_reg<25><19>>.
    Found 1-bit register for signal <data_reg<25><18>>.
    Found 1-bit register for signal <data_reg<25><17>>.
    Found 1-bit register for signal <data_reg<25><16>>.
    Found 1-bit register for signal <data_reg<25><15>>.
    Found 1-bit register for signal <data_reg<25><14>>.
    Found 1-bit register for signal <data_reg<25><13>>.
    Found 1-bit register for signal <data_reg<25><12>>.
    Found 1-bit register for signal <data_reg<25><11>>.
    Found 1-bit register for signal <data_reg<25><10>>.
    Found 1-bit register for signal <data_reg<25><9>>.
    Found 1-bit register for signal <data_reg<25><8>>.
    Found 1-bit register for signal <data_reg<25><7>>.
    Found 1-bit register for signal <data_reg<25><6>>.
    Found 1-bit register for signal <data_reg<25><5>>.
    Found 1-bit register for signal <data_reg<25><4>>.
    Found 1-bit register for signal <data_reg<25><3>>.
    Found 1-bit register for signal <data_reg<25><2>>.
    Found 1-bit register for signal <data_reg<25><1>>.
    Found 1-bit register for signal <data_reg<25><0>>.
    Found 1-bit register for signal <data_reg<26><31>>.
    Found 1-bit register for signal <data_reg<26><30>>.
    Found 1-bit register for signal <data_reg<26><29>>.
    Found 1-bit register for signal <data_reg<26><28>>.
    Found 1-bit register for signal <data_reg<26><27>>.
    Found 1-bit register for signal <data_reg<26><26>>.
    Found 1-bit register for signal <data_reg<26><25>>.
    Found 1-bit register for signal <data_reg<26><24>>.
    Found 1-bit register for signal <data_reg<26><23>>.
    Found 1-bit register for signal <data_reg<26><22>>.
    Found 1-bit register for signal <data_reg<26><21>>.
    Found 1-bit register for signal <data_reg<26><20>>.
    Found 1-bit register for signal <data_reg<26><19>>.
    Found 1-bit register for signal <data_reg<26><18>>.
    Found 1-bit register for signal <data_reg<26><17>>.
    Found 1-bit register for signal <data_reg<26><16>>.
    Found 1-bit register for signal <data_reg<26><15>>.
    Found 1-bit register for signal <data_reg<26><14>>.
    Found 1-bit register for signal <data_reg<26><13>>.
    Found 1-bit register for signal <data_reg<26><12>>.
    Found 1-bit register for signal <data_reg<26><11>>.
    Found 1-bit register for signal <data_reg<26><10>>.
    Found 1-bit register for signal <data_reg<26><9>>.
    Found 1-bit register for signal <data_reg<26><8>>.
    Found 1-bit register for signal <data_reg<26><7>>.
    Found 1-bit register for signal <data_reg<26><6>>.
    Found 1-bit register for signal <data_reg<26><5>>.
    Found 1-bit register for signal <data_reg<26><4>>.
    Found 1-bit register for signal <data_reg<26><3>>.
    Found 1-bit register for signal <data_reg<26><2>>.
    Found 1-bit register for signal <data_reg<26><1>>.
    Found 1-bit register for signal <data_reg<26><0>>.
    Found 1-bit register for signal <data_reg<27><31>>.
    Found 1-bit register for signal <data_reg<27><30>>.
    Found 1-bit register for signal <data_reg<27><29>>.
    Found 1-bit register for signal <data_reg<27><28>>.
    Found 1-bit register for signal <data_reg<27><27>>.
    Found 1-bit register for signal <data_reg<27><26>>.
    Found 1-bit register for signal <data_reg<27><25>>.
    Found 1-bit register for signal <data_reg<27><24>>.
    Found 1-bit register for signal <data_reg<27><23>>.
    Found 1-bit register for signal <data_reg<27><22>>.
    Found 1-bit register for signal <data_reg<27><21>>.
    Found 1-bit register for signal <data_reg<27><20>>.
    Found 1-bit register for signal <data_reg<27><19>>.
    Found 1-bit register for signal <data_reg<27><18>>.
    Found 1-bit register for signal <data_reg<27><17>>.
    Found 1-bit register for signal <data_reg<27><16>>.
    Found 1-bit register for signal <data_reg<27><15>>.
    Found 1-bit register for signal <data_reg<27><14>>.
    Found 1-bit register for signal <data_reg<27><13>>.
    Found 1-bit register for signal <data_reg<27><12>>.
    Found 1-bit register for signal <data_reg<27><11>>.
    Found 1-bit register for signal <data_reg<27><10>>.
    Found 1-bit register for signal <data_reg<27><9>>.
    Found 1-bit register for signal <data_reg<27><8>>.
    Found 1-bit register for signal <data_reg<27><7>>.
    Found 1-bit register for signal <data_reg<27><6>>.
    Found 1-bit register for signal <data_reg<27><5>>.
    Found 1-bit register for signal <data_reg<27><4>>.
    Found 1-bit register for signal <data_reg<27><3>>.
    Found 1-bit register for signal <data_reg<27><2>>.
    Found 1-bit register for signal <data_reg<27><1>>.
    Found 1-bit register for signal <data_reg<27><0>>.
    Found 1-bit register for signal <data_reg<28><31>>.
    Found 1-bit register for signal <data_reg<28><30>>.
    Found 1-bit register for signal <data_reg<28><29>>.
    Found 1-bit register for signal <data_reg<28><28>>.
    Found 1-bit register for signal <data_reg<28><27>>.
    Found 1-bit register for signal <data_reg<28><26>>.
    Found 1-bit register for signal <data_reg<28><25>>.
    Found 1-bit register for signal <data_reg<28><24>>.
    Found 1-bit register for signal <data_reg<28><23>>.
    Found 1-bit register for signal <data_reg<28><22>>.
    Found 1-bit register for signal <data_reg<28><21>>.
    Found 1-bit register for signal <data_reg<28><20>>.
    Found 1-bit register for signal <data_reg<28><19>>.
    Found 1-bit register for signal <data_reg<28><18>>.
    Found 1-bit register for signal <data_reg<28><17>>.
    Found 1-bit register for signal <data_reg<28><16>>.
    Found 1-bit register for signal <data_reg<28><15>>.
    Found 1-bit register for signal <data_reg<28><14>>.
    Found 1-bit register for signal <data_reg<28><13>>.
    Found 1-bit register for signal <data_reg<28><12>>.
    Found 1-bit register for signal <data_reg<28><11>>.
    Found 1-bit register for signal <data_reg<28><10>>.
    Found 1-bit register for signal <data_reg<28><9>>.
    Found 1-bit register for signal <data_reg<28><8>>.
    Found 1-bit register for signal <data_reg<28><7>>.
    Found 1-bit register for signal <data_reg<28><6>>.
    Found 1-bit register for signal <data_reg<28><5>>.
    Found 1-bit register for signal <data_reg<28><4>>.
    Found 1-bit register for signal <data_reg<28><3>>.
    Found 1-bit register for signal <data_reg<28><2>>.
    Found 1-bit register for signal <data_reg<28><1>>.
    Found 1-bit register for signal <data_reg<28><0>>.
    Found 1-bit register for signal <data_reg<29><31>>.
    Found 1-bit register for signal <data_reg<29><30>>.
    Found 1-bit register for signal <data_reg<29><29>>.
    Found 1-bit register for signal <data_reg<29><28>>.
    Found 1-bit register for signal <data_reg<29><27>>.
    Found 1-bit register for signal <data_reg<29><26>>.
    Found 1-bit register for signal <data_reg<29><25>>.
    Found 1-bit register for signal <data_reg<29><24>>.
    Found 1-bit register for signal <data_reg<29><23>>.
    Found 1-bit register for signal <data_reg<29><22>>.
    Found 1-bit register for signal <data_reg<29><21>>.
    Found 1-bit register for signal <data_reg<29><20>>.
    Found 1-bit register for signal <data_reg<29><19>>.
    Found 1-bit register for signal <data_reg<29><18>>.
    Found 1-bit register for signal <data_reg<29><17>>.
    Found 1-bit register for signal <data_reg<29><16>>.
    Found 1-bit register for signal <data_reg<29><15>>.
    Found 1-bit register for signal <data_reg<29><14>>.
    Found 1-bit register for signal <data_reg<29><13>>.
    Found 1-bit register for signal <data_reg<29><12>>.
    Found 1-bit register for signal <data_reg<29><11>>.
    Found 1-bit register for signal <data_reg<29><10>>.
    Found 1-bit register for signal <data_reg<29><9>>.
    Found 1-bit register for signal <data_reg<29><8>>.
    Found 1-bit register for signal <data_reg<29><7>>.
    Found 1-bit register for signal <data_reg<29><6>>.
    Found 1-bit register for signal <data_reg<29><5>>.
    Found 1-bit register for signal <data_reg<29><4>>.
    Found 1-bit register for signal <data_reg<29><3>>.
    Found 1-bit register for signal <data_reg<29><2>>.
    Found 1-bit register for signal <data_reg<29><1>>.
    Found 1-bit register for signal <data_reg<29><0>>.
    Found 1-bit register for signal <data_reg<30><31>>.
    Found 1-bit register for signal <data_reg<30><30>>.
    Found 1-bit register for signal <data_reg<30><29>>.
    Found 1-bit register for signal <data_reg<30><28>>.
    Found 1-bit register for signal <data_reg<30><27>>.
    Found 1-bit register for signal <data_reg<30><26>>.
    Found 1-bit register for signal <data_reg<30><25>>.
    Found 1-bit register for signal <data_reg<30><24>>.
    Found 1-bit register for signal <data_reg<30><23>>.
    Found 1-bit register for signal <data_reg<30><22>>.
    Found 1-bit register for signal <data_reg<30><21>>.
    Found 1-bit register for signal <data_reg<30><20>>.
    Found 1-bit register for signal <data_reg<30><19>>.
    Found 1-bit register for signal <data_reg<30><18>>.
    Found 1-bit register for signal <data_reg<30><17>>.
    Found 1-bit register for signal <data_reg<30><16>>.
    Found 1-bit register for signal <data_reg<30><15>>.
    Found 1-bit register for signal <data_reg<30><14>>.
    Found 1-bit register for signal <data_reg<30><13>>.
    Found 1-bit register for signal <data_reg<30><12>>.
    Found 1-bit register for signal <data_reg<30><11>>.
    Found 1-bit register for signal <data_reg<30><10>>.
    Found 1-bit register for signal <data_reg<30><9>>.
    Found 1-bit register for signal <data_reg<30><8>>.
    Found 1-bit register for signal <data_reg<30><7>>.
    Found 1-bit register for signal <data_reg<30><6>>.
    Found 1-bit register for signal <data_reg<30><5>>.
    Found 1-bit register for signal <data_reg<30><4>>.
    Found 1-bit register for signal <data_reg<30><3>>.
    Found 1-bit register for signal <data_reg<30><2>>.
    Found 1-bit register for signal <data_reg<30><1>>.
    Found 1-bit register for signal <data_reg<30><0>>.
    Found 1-bit register for signal <data_reg<31><31>>.
    Found 1-bit register for signal <data_reg<31><30>>.
    Found 1-bit register for signal <data_reg<31><29>>.
    Found 1-bit register for signal <data_reg<31><28>>.
    Found 1-bit register for signal <data_reg<31><27>>.
    Found 1-bit register for signal <data_reg<31><26>>.
    Found 1-bit register for signal <data_reg<31><25>>.
    Found 1-bit register for signal <data_reg<31><24>>.
    Found 1-bit register for signal <data_reg<31><23>>.
    Found 1-bit register for signal <data_reg<31><22>>.
    Found 1-bit register for signal <data_reg<31><21>>.
    Found 1-bit register for signal <data_reg<31><20>>.
    Found 1-bit register for signal <data_reg<31><19>>.
    Found 1-bit register for signal <data_reg<31><18>>.
    Found 1-bit register for signal <data_reg<31><17>>.
    Found 1-bit register for signal <data_reg<31><16>>.
    Found 1-bit register for signal <data_reg<31><15>>.
    Found 1-bit register for signal <data_reg<31><14>>.
    Found 1-bit register for signal <data_reg<31><13>>.
    Found 1-bit register for signal <data_reg<31><12>>.
    Found 1-bit register for signal <data_reg<31><11>>.
    Found 1-bit register for signal <data_reg<31><10>>.
    Found 1-bit register for signal <data_reg<31><9>>.
    Found 1-bit register for signal <data_reg<31><8>>.
    Found 1-bit register for signal <data_reg<31><7>>.
    Found 1-bit register for signal <data_reg<31><6>>.
    Found 1-bit register for signal <data_reg<31><5>>.
    Found 1-bit register for signal <data_reg<31><4>>.
    Found 1-bit register for signal <data_reg<31><3>>.
    Found 1-bit register for signal <data_reg<31><2>>.
    Found 1-bit register for signal <data_reg<31><1>>.
    Found 1-bit register for signal <data_reg<31><0>>.
    Found 1-bit register for signal <data_reg<0><31>>.
    Found 32-bit 32-to-1 multiplexer for signal <read_data1> created at line 51.
    Found 32-bit 32-to-1 multiplexer for signal <read_data2> created at line 52.
    Summary:
	inferred 1024 D-type flip-flop(s).
	inferred   4 Multiplexer(s).
Unit <register_bank> synthesized.

Synthesizing Unit <ALU_32b>.
    Related source file is "G:\program\xilinx\FPGA_Project\ALU_32b.v".
WARNING:Xst:647 - Input <clock> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
    Found 32-bit subtractor for signal <data_0[31]_data_1[31]_sub_11_OUT> created at line 39.
    Found 32-bit adder for signal <data_0[31]_data_1[31]_add_8_OUT> created at line 38.
    Found 32-bit comparator greater for signal <data_0[31]_data_1[31]_LessThan_1_o> created at line 32
    Found 32-bit comparator equal for signal <zero> created at line 34
    Summary:
	inferred   1 Adder/Subtractor(s).
	inferred   2 Comparator(s).
	inferred  16 Multiplexer(s).
Unit <ALU_32b> synthesized.

Synthesizing Unit <ALU_control>.
    Related source file is "C:/Users/Ahmadreza/Desktop/Project/ALU_control.v".
WARNING:Xst:737 - Found 1-bit latch for signal <op<3>>. Latches may be generated from incomplete case or if statements. We do not recommend the use of latches in FPGA/CPLD designs, as they may lead to timing problems.
WARNING:Xst:737 - Found 1-bit latch for signal <op<2>>. Latches may be generated from incomplete case or if statements. We do not recommend the use of latches in FPGA/CPLD designs, as they may lead to timing problems.
WARNING:Xst:737 - Found 1-bit latch for signal <op<1>>. Latches may be generated from incomplete case or if statements. We do not recommend the use of latches in FPGA/CPLD designs, as they may lead to timing problems.
WARNING:Xst:737 - Found 1-bit latch for signal <op<0>>. Latches may be generated from incomplete case or if statements. We do not recommend the use of latches in FPGA/CPLD designs, as they may lead to timing problems.
    Summary:
	inferred   4 Latch(s).
	inferred  12 Multiplexer(s).
Unit <ALU_control> synthesized.

Synthesizing Unit <data_memory>.
    Related source file is "G:\program\xilinx\FPGA_Project\data_memory.v".
    Found 128x32-bit single-port RAM <Mram_data_mem> for signal <data_mem>.
    Summary:
	inferred   1 RAM(s).
	inferred   1 Multiplexer(s).
Unit <data_memory> synthesized.

=========================================================================
HDL Synthesis Report

Macro Statistics
# RAMs                                                 : 2
 128x32-bit single-port RAM                            : 1
 32x32-bit single-port Read Only RAM                   : 1
# Adders/Subtractors                                   : 3
 32-bit adder                                          : 2
 32-bit addsub                                         : 1
# Registers                                            : 64
 1-bit register                                        : 32
 32-bit register                                       : 32
# Latches                                              : 10
 1-bit latch                                           : 10
# Comparators                                          : 2
 32-bit comparator equal                               : 1
 32-bit comparator greater                             : 1
# Multiplexers                                         : 50
 1-bit 2-to-1 multiplexer                              : 27
 32-bit 2-to-1 multiplexer                             : 20
 32-bit 32-to-1 multiplexer                            : 2
 5-bit 2-to-1 multiplexer                              : 1

=========================================================================
INFO:Xst:1767 - HDL ADVISOR - Resource sharing has identified that some arithmetic operations in this design can share the same physical resources for reduced device utilization. For improved clock frequency you may try to disable resource sharing.

=========================================================================
*                       Advanced HDL Synthesis                          *
=========================================================================

WARNING:Xst:1710 - FF/Latch <op_3> (without init value) has a constant value of 0 in block <ALU_ctrl>. This FF/Latch will be trimmed during the optimization process.

Synthesizing (advanced) Unit <data_memory>.
INFO:Xst:3218 - HDL ADVISOR - The RAM <Mram_data_mem> will be implemented on LUTs either because you have described an asynchronous read or because of currently unsupported block RAM features. If you have described an asynchronous read, making it synchronous would allow you to take advantage of available block RAM resources, for optimized device usage and improved timings. Please refer to your documentation for coding guidelines.
    -----------------------------------------------------------------------
    | ram_type           | Distributed                         |          |
    -----------------------------------------------------------------------
    | Port A                                                              |
    |     aspect ratio   | 128-word x 32-bit                   |          |
    |     clkA           | connected to signal <clock>         | rise     |
    |     weA            | connected to signal <mem_write>     | high     |
    |     addrA          | connected to signal <address>       |          |
    |     diA            | connected to signal <write_data>    |          |
    |     doA            | connected to internal node          |          |
    -----------------------------------------------------------------------
Unit <data_memory> synthesized (advanced).

Synthesizing (advanced) Unit <instruction_memory>.
INFO:Xst:3231 - The small RAM <Mram_memory> will be implemented on LUTs in order to maximize performance and save block RAM resources. If you want to force its implementation on block, use option/constraint ram_style.
    -----------------------------------------------------------------------
    | ram_type           | Distributed                         |          |
    -----------------------------------------------------------------------
    | Port A                                                              |
    |     aspect ratio   | 32-word x 32-bit                    |          |
    |     weA            | connected to signal <GND>           | high     |
    |     addrA          | connected to signal <instruction_address> |          |
    |     diA            | connected to signal <GND>           |          |
    |     doA            | connected to internal node          |          |
    -----------------------------------------------------------------------
Unit <instruction_memory> synthesized (advanced).

=========================================================================
Advanced HDL Synthesis Report

Macro Statistics
# RAMs                                                 : 2
 128x32-bit single-port distributed RAM                : 1
 32x32-bit single-port distributed Read Only RAM       : 1
# Adders/Subtractors                                   : 3
 32-bit adder                                          : 2
 32-bit addsub                                         : 1
# Registers                                            : 1056
 Flip-Flops                                            : 1056
# Comparators                                          : 2
 32-bit comparator equal                               : 1
 32-bit comparator greater                             : 1
# Multiplexers                                         : 112
 1-bit 2-to-1 multiplexer                              : 27
 1-bit 32-to-1 multiplexer                             : 64
 32-bit 2-to-1 multiplexer                             : 20
 5-bit 2-to-1 multiplexer                              : 1

=========================================================================

=========================================================================
*                         Low Level Synthesis                           *
=========================================================================
WARNING:Xst:1710 - FF/Latch <op_3> (without init value) has a constant value of 0 in block <ALU_control>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:2677 - Node <PC/data_5> of sequential type is unconnected in block <mips>.
WARNING:Xst:2677 - Node <PC/data_6> of sequential type is unconnected in block <mips>.
WARNING:Xst:2677 - Node <PC/data_7> of sequential type is unconnected in block <mips>.
WARNING:Xst:2677 - Node <PC/data_8> of sequential type is unconnected in block <mips>.
WARNING:Xst:2677 - Node <PC/data_9> of sequential type is unconnected in block <mips>.
WARNING:Xst:2677 - Node <PC/data_10> of sequential type is unconnected in block <mips>.
WARNING:Xst:2677 - Node <PC/data_11> of sequential type is unconnected in block <mips>.
WARNING:Xst:2677 - Node <PC/data_12> of sequential type is unconnected in block <mips>.
WARNING:Xst:2677 - Node <PC/data_13> of sequential type is unconnected in block <mips>.
WARNING:Xst:2677 - Node <PC/data_14> of sequential type is unconnected in block <mips>.
WARNING:Xst:2677 - Node <PC/data_15> of sequential type is unconnected in block <mips>.
WARNING:Xst:2677 - Node <PC/data_16> of sequential type is unconnected in block <mips>.
WARNING:Xst:2677 - Node <PC/data_17> of sequential type is unconnected in block <mips>.
WARNING:Xst:2677 - Node <PC/data_18> of sequential type is unconnected in block <mips>.
WARNING:Xst:2677 - Node <PC/data_19> of sequential type is unconnected in block <mips>.
WARNING:Xst:2677 - Node <PC/data_20> of sequential type is unconnected in block <mips>.
WARNING:Xst:2677 - Node <PC/data_21> of sequential type is unconnected in block <mips>.
WARNING:Xst:2677 - Node <PC/data_22> of sequential type is unconnected in block <mips>.
WARNING:Xst:2677 - Node <PC/data_23> of sequential type is unconnected in block <mips>.
WARNING:Xst:2677 - Node <PC/data_24> of sequential type is unconnected in block <mips>.
WARNING:Xst:2677 - Node <PC/data_25> of sequential type is unconnected in block <mips>.
WARNING:Xst:2677 - Node <PC/data_26> of sequential type is unconnected in block <mips>.
WARNING:Xst:2677 - Node <PC/data_27> of sequential type is unconnected in block <mips>.
WARNING:Xst:2677 - Node <PC/data_28> of sequential type is unconnected in block <mips>.
WARNING:Xst:2677 - Node <PC/data_29> of sequential type is unconnected in block <mips>.
WARNING:Xst:2677 - Node <PC/data_30> of sequential type is unconnected in block <mips>.
WARNING:Xst:2677 - Node <PC/data_31> of sequential type is unconnected in block <mips>.
WARNING:Xst:3002 - This design contains one or more registers/latches that are directly
   incompatible with the Spartan6 architecture. The two primary causes of this is
   either a register or latch described with both an asynchronous set and
   asynchronous reset, or a register or latch described with an asynchronous
   set or reset which however has an initialization value of the opposite 
   polarity (i.e. asynchronous reset with an initialization value of 1).
    While this circuit can be built, it creates a sub-optimal implementation
   in terms of area, power and performance. For a more optimal implementation
   Xilinx highly recommends one of the following:

          1) Remove either the set or reset from all registers and latches
             if not needed for required functionality
          2) Modify the code in order to produce a synchronous set
             and/or reset (both is preferred)
          3) Ensure all registers have the same initialization value as the
             described asynchronous set or reset polarity
          4) Use the -async_to_sync option to transform the asynchronous
             set/reset to synchronous operation
             (timing simulation highly recommended when using this option)

  Please refer to http://www.xilinx.com search string "Spartan6 asynchronous set/reset" for more details.

  List of register instances with asynchronous set and reset:
    op_2 in unit <ALU_control>
    ALUop_1 in unit <Control>
    Branch in unit <Control>
    ALUsrc in unit <Control>
    RegWrite in unit <Control>
    MemtoReg in unit <Control>
    RegDst in unit <Control>


Optimizing unit <mips> ...

Optimizing unit <register_bank> ...

Optimizing unit <ALU_32b> ...

Optimizing unit <Control> ...

Optimizing unit <ALU_control> ...
WARNING:Xst:1710 - FF/Latch <RB/data_reg_99> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_89> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_79> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_69> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_59> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_49> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_310> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_230> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_130> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_09> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_318> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_308> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_298> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_288> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_278> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_268> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_258> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_248> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_238> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2210> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2112> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_208> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_198> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_188> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_178> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_168> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_158> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_410> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_320> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_240> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_140> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_010> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_319> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_309> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_299> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_289> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_279> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_269> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_259> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_249> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_239> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2211> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2113> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_209> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_199> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_189> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_179> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_169> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_159> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_149> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_139> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1211> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1113> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_109> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_197> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_187> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_177> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_167> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_157> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_147> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_137> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_128> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1111> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_107> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_97> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_87> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_77> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_67> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_57> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_47> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_38> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_227> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_127> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_07> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_316> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_306> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_296> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_286> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_276> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_266> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_256> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_148> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_138> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1210> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1112> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_108> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_98> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_88> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_78> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_68> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_58> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_48> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_39> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_229> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_129> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_08> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_317> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_307> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_297> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_287> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_277> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_267> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_257> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_247> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_237> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_228> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2111> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_207> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2116> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2012> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1912> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1812> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1712> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1612> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1512> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1412> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1312> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1214> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1116> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1012> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_912> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_812> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_712> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_612> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_512> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_412> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_322> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_260> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_160> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_012> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_3111> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_3011> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2911> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2811> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2711> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1613> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1513> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1413> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1313> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1215> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1117> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1013> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_913> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_813> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_713> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_613> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_513> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_413> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_323> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_270> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_170> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_013> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_3112> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_3012> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2912> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2812> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2712> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2612> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2512> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2412> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2312> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2214> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_3110> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_3010> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2910> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2810> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2710> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2610> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2510> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2410> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2310> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2212> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2114> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2010> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1910> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1810> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1710> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1610> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1510> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1410> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1310> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1212> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1114> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1010> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_910> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_810> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_710> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_610> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_510> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2611> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2511> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2411> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2311> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2213> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2115> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2011> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1911> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1811> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1711> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1611> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1511> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1411> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1311> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1213> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1115> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1011> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_911> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_811> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_711> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_611> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_511> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_411> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_321> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_250> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_150> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_011> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_162> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_152> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_142> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_132> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_122> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_113> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_102> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_92> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_82> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_72> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_62> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_52> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_42> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_33> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_212> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_112> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_02> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_311> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_301> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_291> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_281> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_271> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_261> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_251> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_241> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_231> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_221> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_115> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_103> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_93> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_83> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_73> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_63> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_53> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_43> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_34> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_214> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_114> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_03> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_312> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_302> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_292> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_282> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_272> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_262> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_252> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_242> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_232> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_222> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_213> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_202> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_192> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_182> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_172> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_26> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_25> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_24> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_23> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_22> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_21> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_20> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_19> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_18> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_17> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_16> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_15> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_14> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_13> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_12> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_11> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_10> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_9> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_8> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_7> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_6> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_5> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_4> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_3> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_0> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_211> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_201> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_191> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_181> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_171> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_161> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_151> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_141> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_131> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_121> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_111> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_101> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_91> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_81> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_71> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_61> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_51> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_41> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_32> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_210> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_110> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_01> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_31> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_30> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_29> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_28> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_27> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_295> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_285> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_275> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_265> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_255> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_245> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_235> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_225> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_219> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_205> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_195> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_185> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_175> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_165> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_155> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_145> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_135> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_125> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_119> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_105> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_95> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_85> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_75> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_65> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_55> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_45> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_36> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_246> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_236> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_226> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2110> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_206> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_196> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_186> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_176> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_166> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_156> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_146> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_136> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_126> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1110> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_106> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_96> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_86> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_76> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_66> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_56> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_46> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_37> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_220> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_120> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_06> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_315> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_305> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_64> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_54> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_44> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_35> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_216> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_116> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_04> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_313> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_303> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_293> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_283> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_273> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_263> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_253> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_243> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_233> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_223> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_215> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_203> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_193> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_183> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_173> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_163> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_153> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_143> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_133> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_123> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_218> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_118> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_05> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_314> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_304> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_294> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_284> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_274> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_264> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_254> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_244> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_234> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_224> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_217> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_204> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_194> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_184> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_174> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_164> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_154> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_144> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_134> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_124> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_117> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_104> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_94> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_84> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_74> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2622> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2522> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2422> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2322> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2224> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2126> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2022> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1922> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1822> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1722> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1622> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1522> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1422> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1322> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1224> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1126> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1022> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_922> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_822> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_722> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_622> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_522> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_422> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_332> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2106> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1106> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_022> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2127> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2023> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1923> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1823> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1723> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1623> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1523> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1423> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1323> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1225> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1127> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1023> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_923> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_823> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_723> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_623> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_523> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_423> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_333> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2107> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1107> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_023> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_3122> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_3022> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2922> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2822> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2722> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_421> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_331> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2105> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1105> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_021> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_3120> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_3020> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2920> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2820> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2720> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2620> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2520> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2420> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2320> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2222> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2124> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2020> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1920> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1820> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1720> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1620> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1520> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1420> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1320> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1222> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1124> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1020> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_3121> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_3021> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2921> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2821> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2721> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2621> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2521> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2421> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2321> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2223> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2125> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2021> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1921> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1821> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1721> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1621> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1521> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1421> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1321> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1223> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1125> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1021> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_921> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_821> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_721> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_621> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_521> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_626> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_526> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_426> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_336> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2130> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1130> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_026> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_3125> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_3025> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2925> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2825> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2725> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2625> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2525> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2425> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2325> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2227> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2129> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2025> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1925> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1825> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1725> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1625> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1525> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1425> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1325> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1227> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg<13>_0> has a constant value of 1 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg<13>_1> has a constant value of 1 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_3126> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_3026> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2926> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2826> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2726> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2626> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2526> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2426> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2326> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2228> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2131> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2026> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1926> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1826> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1726> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1626> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1526> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1426> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1326> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1228> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1131> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1026> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_926> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_826> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_726> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1624> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1524> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1424> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1324> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1226> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1128> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1024> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_924> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_824> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_724> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_624> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_524> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_424> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_334> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2108> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1108> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_024> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_3123> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_3023> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2923> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2823> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2723> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2623> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2523> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2423> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2323> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2225> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1129> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1025> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_925> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_825> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_725> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_625> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_525> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_425> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_335> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2109> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1109> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_025> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_3124> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_3024> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2924> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2824> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2724> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2624> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2524> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2424> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2324> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2226> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2128> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2024> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1924> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1824> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1724> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1100> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_016> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_3115> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_3015> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2915> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2815> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2715> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2615> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2515> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2415> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2315> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2217> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2119> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2015> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1915> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1815> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1715> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1615> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1515> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1415> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1315> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1217> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1119> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1015> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_915> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_815> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_715> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2816> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2716> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2616> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2516> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2416> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2316> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2218> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2120> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2016> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1916> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1816> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1716> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1616> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1516> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1416> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1316> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1218> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1120> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1016> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_916> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_816> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_716> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_616> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_516> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_416> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_326> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2100> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1118> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1014> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_914> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_814> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_714> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_614> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_514> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_414> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_324> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_280> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_180> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_014> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_3113> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_3013> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2913> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2813> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2713> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2613> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2513> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2413> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2313> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2215> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2117> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2013> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1913> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1813> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1713> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_615> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_515> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_415> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_325> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_290> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_190> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_015> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_3114> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_3014> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2914> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2814> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2714> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2614> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2514> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2414> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2314> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2216> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2118> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2014> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1914> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1814> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1714> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1614> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1514> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1414> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1314> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1216> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1419> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1319> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1221> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1123> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1019> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_919> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_819> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_719> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_619> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_519> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_419> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_329> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2103> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1103> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_019> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_3118> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_3018> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2918> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2818> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2718> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2618> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2518> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2418> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2318> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2220> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2122> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2018> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_920> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_820> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_720> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_620> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_520> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_420> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_330> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2104> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1104> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_020> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_3119> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_3019> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2919> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2819> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2719> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2619> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2519> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2419> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2319> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2221> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2123> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2019> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1919> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1819> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1719> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1619> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1519> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2317> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2219> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2121> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2017> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1917> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1817> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1717> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1617> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1517> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1417> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1317> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1219> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1121> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1017> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_917> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_817> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_717> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_617> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_517> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_417> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_327> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2101> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1101> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_017> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_3116> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_3016> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2916> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1918> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1818> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1718> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1618> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1518> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1418> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1318> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1220> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1122> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1018> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_918> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_818> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_718> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_618> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_518> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_418> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_328> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2102> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_1102> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_018> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_3117> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_3017> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2917> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2817> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2717> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2617> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2517> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg_2417> (without init value) has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1293 - FF/Latch <RB/data_reg<13>_31> has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg<13>_30> has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg<13>_29> has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg<13>_28> has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg<13>_27> has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg<13>_26> has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg<13>_25> has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg<13>_24> has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg<13>_23> has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg<13>_22> has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg<13>_21> has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg<13>_20> has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg<13>_19> has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg<13>_18> has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg<13>_17> has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg<13>_14> has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg<13>_16> has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg<13>_15> has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg<13>_13> has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg<13>_12> has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg<13>_11> has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg<13>_10> has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg<13>_9> has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg<13>_8> has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg<13>_7> has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg<13>_6> has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg<13>_5> has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg<13>_4> has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg<13>_3> has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <RB/data_reg<13>_2> has a constant value of 0 in block <mips>. This FF/Latch will be trimmed during the optimization process.

Mapping all equations...
Building and optimizing final netlist ...
Found area constraint ratio of 100 (+ 5) on block mips, actual ratio is 11.
FlipFlop PC/data_0 has been replicated 1 time(s)
FlipFlop PC/data_1 has been replicated 1 time(s)
FlipFlop PC/data_2 has been replicated 2 time(s)
FlipFlop PC/data_3 has been replicated 2 time(s)
FlipFlop PC/data_4 has been replicated 3 time(s)

Final Macro Processing ...

=========================================================================
Final Register Report

Macro Statistics
# Registers                                            : 142
 Flip-Flops                                            : 142

=========================================================================

=========================================================================
*                           Partition Report                            *
=========================================================================

Partition Implementation Status
-------------------------------

  No Partitions were found in this design.

-------------------------------

=========================================================================
*                            Design Summary                             *
=========================================================================

Top Level Output File Name         : mips.ngc

Primitive and Black Box Usage:
------------------------------
# BELS                             : 400
#      GND                         : 1
#      INV                         : 1
#      LUT1                        : 4
#      LUT2                        : 58
#      LUT3                        : 7
#      LUT4                        : 74
#      LUT5                        : 20
#      LUT6                        : 122
#      MUXCY                       : 66
#      MUXF7                       : 4
#      VCC                         : 1
#      XORCY                       : 42
# FlipFlops/Latches                : 149
#      FD                          : 14
#      FDE                         : 96
#      FDR                         : 32
#      LD                          : 7
# RAMS                             : 32
#      RAM128X1S                   : 32
# Clock Buffers                    : 1
#      BUFGP                       : 1
# IO Buffers                       : 32
#      OBUF                        : 32

Device utilization summary:
---------------------------

Selected Device : 6slx9tqg144-3 


Slice Logic Utilization: 
 Number of Slice Registers:             149  out of  11440     1%  
 Number of Slice LUTs:                  350  out of   5720     6%  
    Number used as Logic:               286  out of   5720     5%  
    Number used as Memory:               64  out of   1440     4%  
       Number used as RAM:               64

Slice Logic Distribution: 
 Number of LUT Flip Flop pairs used:    445
   Number with an unused Flip Flop:     296  out of    445    66%  
   Number with an unused LUT:            95  out of    445    21%  
   Number of fully used LUT-FF pairs:    54  out of    445    12%  
   Number of unique control sets:        10

IO Utilization: 
 Number of IOs:                          33
 Number of bonded IOBs:                  33  out of    102    32%  

Specific Feature Utilization:
 Number of BUFG/BUFGCTRLs:                1  out of     16     6%  

---------------------------
Partition Resource Summary:
---------------------------

  No Partitions were found in this design.

---------------------------


=========================================================================
Timing Report

NOTE: THESE TIMING NUMBERS ARE ONLY A SYNTHESIS ESTIMATE.
      FOR ACCURATE TIMING INFORMATION PLEASE REFER TO THE TRACE REPORT
      GENERATED AFTER PLACE-and-ROUTE.

Clock Information:
------------------
----------------------------------------+--------------------------+-------+
Clock Signal                            | Clock buffer(FF name)    | Load  |
----------------------------------------+--------------------------+-------+
clock                                   | BUFGP                    | 174   |
ALU_ctrl/op_1                           | NONE(control/ALUop_1)    | 2     |
control/Branch_G(control/Branch_G:O)    | NONE(*)(control/Branch)  | 2     |
control/MemtoReg_G(control/MemtoReg_G:O)| NONE(*)(control/MemtoReg)| 1     |
control/RegDst_G(control/RegDst_G:O)    | NONE(*)(control/RegDst)  | 1     |
ALU_ctrl/op_2_G(ALU_ctrl/op_2_G:O)      | NONE(*)(ALU_ctrl/op_2)   | 1     |
----------------------------------------+--------------------------+-------+
(*) These 4 clock signal(s) are generated by combinatorial logic,
and XST is not able to identify which are the primary clock signals.
Please use the CLOCK_SIGNAL constraint to specify the clock signal(s) generated by combinatorial logic.
INFO:Xst:2169 - HDL ADVISOR - Some clock signals were not automatically buffered by XST with BUFG/BUFR resources. Please use the buffer_type constraint in order to insert these buffers to the clock signals to help prevent skew problems.

Asynchronous Control Signals Information:
----------------------------------------
No asynchronous control signals found in this design

Timing Summary:
---------------
Speed Grade: -3

   Minimum period: 10.072ns (Maximum Frequency: 99.285MHz)
   Minimum input arrival time before clock: No path found
   Maximum output required time after clock: 13.120ns
   Maximum combinational path delay: No path found

Timing Details:
---------------
All values displayed in nanoseconds (ns)

=========================================================================
Timing constraint: Default period analysis for Clock 'clock'
  Clock period: 10.072ns (frequency: 99.285MHz)
  Total number of paths / destination ports: 12402452 / 526
-------------------------------------------------------------------------
Delay:               10.072ns (Levels of Logic = 27)
  Source:            PC/data_4_1 (FF)
  Destination:       RB/data_reg_3130 (FF)
  Source Clock:      clock rising
  Destination Clock: clock rising

  Data Path: PC/data_4_1 to RB/data_reg_3130
                                Gate     Net
    Cell:in->out      fanout   Delay   Delay  Logical Name (Net Name)
    ----------------------------------------  ------------
     FD:C->Q               4   0.447   1.028  PC/data_4_1 (PC/data_4_1)
     LUT5:I0->O           17   0.203   1.132  IM/Mram_memory171_1 (IM/Mram_memory171)
     LUT6:I4->O            2   0.203   0.617  RB/mux58_82 (RB/mux58_4)
     LUT3:I2->O            4   0.205   0.931  mux_ALU/Mmux_data_out271 (ALU_data_1<4>)
     LUT4:I0->O            1   0.203   0.000  ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_lut<2> (ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_lut<2>)
     MUXCY:S->O            1   0.172   0.000  ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<2> (ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<2>)
     MUXCY:CI->O           1   0.019   0.000  ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<3> (ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<3>)
     MUXCY:CI->O           1   0.019   0.000  ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<4> (ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<4>)
     MUXCY:CI->O           1   0.019   0.000  ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<5> (ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<5>)
     MUXCY:CI->O           1   0.019   0.000  ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<6> (ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<6>)
     MUXCY:CI->O           1   0.019   0.000  ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<7> (ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<7>)
     MUXCY:CI->O           1   0.019   0.000  ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<8> (ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<8>)
     MUXCY:CI->O           1   0.019   0.000  ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<9> (ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<9>)
     MUXCY:CI->O           1   0.019   0.000  ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<10> (ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<10>)
     MUXCY:CI->O           1   0.019   0.000  ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<11> (ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<11>)
     MUXCY:CI->O           1   0.019   0.000  ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<12> (ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<12>)
     MUXCY:CI->O           1   0.019   0.000  ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<13> (ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<13>)
     MUXCY:CI->O           1   0.019   0.000  ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<14> (ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<14>)
     MUXCY:CI->O          32   0.213   1.292  ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<15> (ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<15>)
     LUT6:I5->O            1   0.205   0.000  ALU/Mmux__n0044_rs_lut<0> (ALU/Mmux__n0044_rs_lut<0>)
     MUXCY:S->O            1   0.172   0.000  ALU/Mmux__n0044_rs_cy<0> (ALU/Mmux__n0044_rs_cy<0>)
     MUXCY:CI->O           1   0.019   0.000  ALU/Mmux__n0044_rs_cy<1> (ALU/Mmux__n0044_rs_cy<1>)
     MUXCY:CI->O           1   0.019   0.000  ALU/Mmux__n0044_rs_cy<2> (ALU/Mmux__n0044_rs_cy<2>)
     MUXCY:CI->O           1   0.019   0.000  ALU/Mmux__n0044_rs_cy<3> (ALU/Mmux__n0044_rs_cy<3>)
     MUXCY:CI->O           1   0.019   0.000  ALU/Mmux__n0044_rs_cy<4> (ALU/Mmux__n0044_rs_cy<4>)
     XORCY:CI->O          33   0.180   1.305  ALU/Mmux__n0044_rs_xor<5> (ALU_result<5>)
     RAM128X1S:A5->O       2   0.336   0.617  DM/Mram_data_mem3 (DM/_n0008<2>)
     LUT4:I3->O            4   0.205   0.000  mux_DM/Mmux_data_out231 (write_data<2>)
     FDE:D                     0.102          RB/data_reg_2132
    ----------------------------------------
    Total                     10.072ns (3.150ns logic, 6.922ns route)
                                       (31.3% logic, 68.7% route)

=========================================================================
Timing constraint: Default OFFSET OUT AFTER for Clock 'clock'
  Total number of paths / destination ports: 1683264 / 32
-------------------------------------------------------------------------
Offset:              13.120ns (Levels of Logic = 28)
  Source:            PC/data_4_1 (FF)
  Destination:       wire_DM<31> (PAD)
  Source Clock:      clock rising

  Data Path: PC/data_4_1 to wire_DM<31>
                                Gate     Net
    Cell:in->out      fanout   Delay   Delay  Logical Name (Net Name)
    ----------------------------------------  ------------
     FD:C->Q               4   0.447   1.028  PC/data_4_1 (PC/data_4_1)
     LUT5:I0->O           17   0.203   1.132  IM/Mram_memory171_1 (IM/Mram_memory171)
     LUT6:I4->O            2   0.203   0.617  RB/mux58_82 (RB/mux58_4)
     LUT3:I2->O            4   0.205   0.931  mux_ALU/Mmux_data_out271 (ALU_data_1<4>)
     LUT4:I0->O            1   0.203   0.000  ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_lut<2> (ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_lut<2>)
     MUXCY:S->O            1   0.172   0.000  ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<2> (ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<2>)
     MUXCY:CI->O           1   0.019   0.000  ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<3> (ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<3>)
     MUXCY:CI->O           1   0.019   0.000  ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<4> (ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<4>)
     MUXCY:CI->O           1   0.019   0.000  ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<5> (ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<5>)
     MUXCY:CI->O           1   0.019   0.000  ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<6> (ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<6>)
     MUXCY:CI->O           1   0.019   0.000  ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<7> (ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<7>)
     MUXCY:CI->O           1   0.019   0.000  ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<8> (ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<8>)
     MUXCY:CI->O           1   0.019   0.000  ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<9> (ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<9>)
     MUXCY:CI->O           1   0.019   0.000  ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<10> (ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<10>)
     MUXCY:CI->O           1   0.019   0.000  ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<11> (ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<11>)
     MUXCY:CI->O           1   0.019   0.000  ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<12> (ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<12>)
     MUXCY:CI->O           1   0.019   0.000  ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<13> (ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<13>)
     MUXCY:CI->O           1   0.019   0.000  ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<14> (ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<14>)
     MUXCY:CI->O          32   0.213   1.292  ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<15> (ALU/Mcompar_data_0[31]_data_1[31]_LessThan_1_o_cy<15>)
     LUT6:I5->O            1   0.205   0.000  ALU/Mmux__n0044_rs_lut<0> (ALU/Mmux__n0044_rs_lut<0>)
     MUXCY:S->O            1   0.172   0.000  ALU/Mmux__n0044_rs_cy<0> (ALU/Mmux__n0044_rs_cy<0>)
     MUXCY:CI->O           1   0.019   0.000  ALU/Mmux__n0044_rs_cy<1> (ALU/Mmux__n0044_rs_cy<1>)
     MUXCY:CI->O           1   0.019   0.000  ALU/Mmux__n0044_rs_cy<2> (ALU/Mmux__n0044_rs_cy<2>)
     MUXCY:CI->O           1   0.019   0.000  ALU/Mmux__n0044_rs_cy<3> (ALU/Mmux__n0044_rs_cy<3>)
     MUXCY:CI->O           1   0.019   0.000  ALU/Mmux__n0044_rs_cy<4> (ALU/Mmux__n0044_rs_cy<4>)
     XORCY:CI->O          33   0.180   1.305  ALU/Mmux__n0044_rs_xor<5> (ALU_result<5>)
     RAM128X1S:A5->O       2   0.336   0.617  DM/Mram_data_mem3 (DM/_n0008<2>)
     LUT2:I1->O            1   0.205   0.579  DM/Mmux_data_out231 (wire_DM_2_OBUF)
     OBUF:I->O                 2.571          wire_DM_2_OBUF (wire_DM<2>)
    ----------------------------------------
    Total                     13.120ns (5.619ns logic, 7.501ns route)
                                       (42.8% logic, 57.2% route)

=========================================================================
Timing constraint: Default OFFSET OUT AFTER for Clock 'ALU_ctrl/op_2_G'
  Total number of paths / destination ports: 1120 / 32
-------------------------------------------------------------------------
Offset:              8.413ns (Levels of Logic = 10)
  Source:            ALU_ctrl/op_2 (LATCH)
  Destination:       wire_DM<31> (PAD)
  Source Clock:      ALU_ctrl/op_2_G falling

  Data Path: ALU_ctrl/op_2 to wire_DM<31>
                                Gate     Net
    Cell:in->out      fanout   Delay   Delay  Logical Name (Net Name)
    ----------------------------------------  ------------
     LD:G->Q              33   0.498   1.670  ALU_ctrl/op_2 (ALU_ctrl/op_2)
     LUT6:I0->O            1   0.203   0.000  ALU/Mmux__n0044_rs_lut<0> (ALU/Mmux__n0044_rs_lut<0>)
     MUXCY:S->O            1   0.172   0.000  ALU/Mmux__n0044_rs_cy<0> (ALU/Mmux__n0044_rs_cy<0>)
     MUXCY:CI->O           1   0.019   0.000  ALU/Mmux__n0044_rs_cy<1> (ALU/Mmux__n0044_rs_cy<1>)
     MUXCY:CI->O           1   0.019   0.000  ALU/Mmux__n0044_rs_cy<2> (ALU/Mmux__n0044_rs_cy<2>)
     MUXCY:CI->O           1   0.019   0.000  ALU/Mmux__n0044_rs_cy<3> (ALU/Mmux__n0044_rs_cy<3>)
     MUXCY:CI->O           1   0.019   0.000  ALU/Mmux__n0044_rs_cy<4> (ALU/Mmux__n0044_rs_cy<4>)
     XORCY:CI->O          33   0.180   1.305  ALU/Mmux__n0044_rs_xor<5> (ALU_result<5>)
     RAM128X1S:A5->O       2   0.336   0.617  DM/Mram_data_mem3 (DM/_n0008<2>)
     LUT2:I1->O            1   0.205   0.579  DM/Mmux_data_out231 (wire_DM_2_OBUF)
     OBUF:I->O                 2.571          wire_DM_2_OBUF (wire_DM<2>)
    ----------------------------------------
    Total                      8.413ns (4.241ns logic, 4.172ns route)
                                       (50.4% logic, 49.6% route)

=========================================================================

Cross Clock Domains Report:
--------------------------

Clock to Setup on destination clock ALU_ctrl/op_2_G
----------------+---------+---------+---------+---------+
                | Src:Rise| Src:Fall| Src:Rise| Src:Fall|
Source Clock    |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
----------------+---------+---------+---------+---------+
control/Branch_G|         |         |    1.514|         |
----------------+---------+---------+---------+---------+

Clock to Setup on destination clock clock
------------------+---------+---------+---------+---------+
                  | Src:Rise| Src:Fall| Src:Rise| Src:Fall|
Source Clock      |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
------------------+---------+---------+---------+---------+
ALU_ctrl/op_2_G   |         |    5.365|         |         |
clock             |   10.072|         |         |         |
control/Branch_G  |         |    3.210|         |         |
control/MemtoReg_G|         |    2.325|         |         |
control/RegDst_G  |         |    4.158|         |         |
------------------+---------+---------+---------+---------+

Clock to Setup on destination clock control/Branch_G
---------------+---------+---------+---------+---------+
               | Src:Rise| Src:Fall| Src:Rise| Src:Fall|
Source Clock   |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
---------------+---------+---------+---------+---------+
clock          |         |         |    3.451|         |
---------------+---------+---------+---------+---------+

Clock to Setup on destination clock control/MemtoReg_G
---------------+---------+---------+---------+---------+
               | Src:Rise| Src:Fall| Src:Rise| Src:Fall|
Source Clock   |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
---------------+---------+---------+---------+---------+
clock          |         |         |    2.051|         |
---------------+---------+---------+---------+---------+

Clock to Setup on destination clock control/RegDst_G
---------------+---------+---------+---------+---------+
               | Src:Rise| Src:Fall| Src:Rise| Src:Fall|
Source Clock   |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
---------------+---------+---------+---------+---------+
clock          |         |         |    3.431|         |
---------------+---------+---------+---------+---------+

=========================================================================


Total REAL time to Xst completion: 22.00 secs
Total CPU time to Xst completion: 21.65 secs
 
--> 

Total memory usage is 4524392 kilobytes

Number of errors   :    0 (   0 filtered)
Number of warnings :  944 (   0 filtered)
Number of infos    :    4 (   0 filtered)