Add tests for OR and AND register with itself

Signed-off-by: Dave Thaler <dthaler1968@gmail.com>
Alan-Jowett · Jan 20, 2024 · 2eb430f · 2eb430f
1 parent 98022c9
commit 2eb430f
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diff --git a/tests/alu-bit.data b/tests/alu-bit.data
@@ -15,12 +15,14 @@ jne %r0, 0, exit
 
 or32 %r0, %r5
 or32 %r0, 0xa0
+or32 %r0, %r0
 # %r0 == 0xa5
 jne %r0, 0xa5, exit
 
 and32 %r0, 0xa3
 mov32 %r9, 0x91
 and32 %r0, %r9
+and32 %r0, %r0
 # %r0 == 0x81
 jne %r0, 0x81, exit
 

diff --git a/tests/alu64-bit.data b/tests/alu64-bit.data
@@ -15,12 +15,14 @@ jne %r0, 0, exit
 
 or %r0, %r5
 or %r0, 0xa0
+or %r0, %r0
 # %r0 == 0xa5
 jne %r0, 0xa5, exit
 
 and %r0, 0xa3
 mov %r9, 0x91
 and %r0, %r9
+and %r0, %r0
 # %r0 == 0x81
 jne %r0, 0x81, exit
 

diff --git a/tests/jset-reg.data b/tests/jset-reg.data
@@ -5,7 +5,7 @@ mov32 %r0, 0
 mov32 %r1, 0x7
 mov32 %r2, 0x8
 jset %r1, %r2, exit # Not taken
-jset $r1, %r1, +1 # Taken
+jset %r1, %r1, +1 # Taken
 exit
 
 mov32 %r0, 1