GitHub - AlexandreTK/VHDL-FPGA-RTL

Name		Name	Last commit message	Last commit date
Latest commit History 1 Commit
project_folder/2_prova_1ctr/prova		project_folder/2_prova_1ctr/prova
Controller's_FSM.jpg		Controller's_FSM.jpg
Controller_and_Datapath.jpg		Controller_and_Datapath.jpg
cmp.vhd		cmp.vhd
contador8.vhd		contador8.vhd
fsm.vhd		fsm.vhd
operacional.vhd		operacional.vhd
toplevel.vhd		toplevel.vhd