Eddie Pritchard - Computer Engineering Students (2024) epritchard@vt.edu, Youssef Chebil - Computer Engineering Student (2025) youssefchebil@vt.edu
Rusty Stewart, Vasili Konstantinakos, Felipe Quintero, Pacheck Nicholas
Eddie Pritchard, Ethan James
IN PROGRESS
The Eight Bit simple PLC is a reductionist eight bit computer and compiler/assembler pair which uses as few 74 series chips as possible. The reductionist design can be replicated in a variety of mediums not only 74 series chips (for example relays, vacuum tubes, or on an fpga) in order to use as little power as possible. This project serves as a research project into computer architecture allowing students to learn what design decisions allow for less hardware to be used at the expense of a more complicated virtual architecture / rom layout.
This project will allow students to explore design choices in computer engineering. Instruction set design maps directly to the hardware required to execute each step within a processor, and certain instruction sets require expensive hardware designs which are wasteful in terms of resources and power. By learning more about how instruction sets design maps to hardware, students will be able to design more efficient computer architectures which multiplex hardware in the time domain (pipelining).
We have already completed the virtual simulation in Logisim. We have already begun writing the assembler / compiler.
Final steps are PCB design of the final design once we have determined the optimal computer architecture.
PCB design is big. First we need to finish simulations to make sure the computer design is turing complete / most effective design avoiding complex / time expensive instructions.
0$ - 50$. The final product will be a hand soldered PCB ordered from JLC PCB. All components (74 series chips) I have on hand.
PCB ordered by 2/3/24