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experiments/spi.py: Cleanup/updates
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Signed-off-by: Hector Martin <marcan@marcan.st>
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marcan committed Apr 16, 2023
1 parent 4604370 commit 88b1866
Showing 1 changed file with 37 additions and 102 deletions.
139 changes: 37 additions & 102 deletions proxyclient/experiments/spi.py
Original file line number Diff line number Diff line change
Expand Up @@ -9,126 +9,72 @@

p.smp_start_secondaries()

p.set32(0x28e580208, 1<<31)
p.clear32(0x28e580208, 1<<31)

spi = u.adt["arm-io/spi3"].get_reg(0)[0]
spi = u.adt["arm-io/spi2"].get_reg(0)[0] + 0x8000
regs = SPIRegs(u, spi)

mon.add(spi, 0x10)
mon.add(spi + 0x30, 0x10)
mon.add(spi + 0x40, 0x400)

aic = u.adt["arm-io/aic"].get_reg(0)[0]
mon.add(aic + 0x6800 + (1109 // 32) * 4, 4)

gpio = u.adt["arm-io/gpio0"].get_reg(0)[0]
count = u.adt["arm-io/gpio0"].getprop("#gpio-pins")

mon.add(gpio, 0x1c8)
mon.add(gpio+0x1e0, 0x300)

mon.poll()
pins={}
for i in range(150, 150+32):
pins[f"pin{i}"] = i

m = GPIOLogicAnalyzer(u, "arm-io/gpio0",
pins={"miso": 0x34, "mosi": 0x35, "clk": 0x36, "cs": 0x37},
#pins={"miso": 0xa, "mosi": 0xb, "clk": 0x20, "cs": 0x21},
#pins={"clk": 46, "mosi": 47, "miso": 48, "cs": 49},
div=1, on_pin_change=False)

#p.write32(spi + 0x100, 0xffffffff)
pins=pins,
regs={"a": gpio},
div=1,
cpu=1,
on_pin_change=True,
on_reg_change=False)

regs.CTRL.val = 0xc
regs.PIN.val = 0x2
regs.CONFIG.val = 0x20 | (1<<15) | 6
regs.CONFIG.val = 0x20 | (1<<15) | 4
regs.CONFIG.val = 0x20 | (1<<15) | 2
regs.CONFIG.val = 0x20 | (3<<15) | 0

def try_all_bits():
for i in range(0, 0x200, 4):
v = p.read32(spi + i)
for j in range(32):
p.write32(spi + i, v ^ (1<<j))
print(f"{i:4x}:{v:8x}:{j:2d} FIFO level:", regs.FIFO_LEVEL.reg.LEVEL_TX)
mon.poll()
p.write32(spi + i, v)


m.regs = {
"CTRL": (spi + 0x00, R_CTRL),
"STATUS": (spi + 0x08, R_STATUS),
"RXCNT": (spi + 0x34),
"TXCNT": (spi + 0x4c),
"FIFO_STAT": (spi + 0x10c, R_FIFO_STAT),
"ISTATUS1": (spi + 0x134, R_ISTATUS1),
"ISTATUS2": (spi + 0x13c, R_ISTATUS2),
"XFSTATUS": (spi + 0x1c0),
"SHIFTCONFIG": (spi + 0x150),
"PINCONFIG": (spi + 0x154),
"PIN": (spi + 0xc),
"3c": (spi + 0x3c),
"DIVSTATUS": (spi + 0x1e0, R_DIVSTATUS)
}
regs.CFG.val = 0x20 | (1<<15) | 6
regs.CFG.val = 0x20 | (1<<15) | 4
regs.CFG.val = 0x20 | (1<<15) | 2
regs.CFG.val = 0x20 | (3<<15) | 0

m.regs = {}

m.start(300000, bufsize=0x80000)

m.start(30000000, bufsize=0x80000)

regs.STATUS.val = 0xffffffff
regs.ISTATUS1.val = 0xffffffff
regs.ISTATUS2.val = 0xffffffff
regs.IF_XFER.val = 0xffffffff
regs.IF_FIFO.val = 0xffffffff

regs.CLKDIV.val = 0xfff
regs.INTER_DLY.val = 0x1000
regs.INTER_DELAY.val = 0x1000

regs.SHIFTCONFIG.val = 0x20fcf7
regs.SHIFTCFG.val = 0x21fcf7

regs.PIN.val = 0x2
print("pinconfig", hex(regs.PINCONFIG.val))
regs.PINCONFIG.val = 0x100
print("pinconfig", hex(regs.PINCFG.val))
regs.PINCFG.val = 0x100
#regs.PINCONFIG.val = 0x2-7
print("pinconfig", hex(regs.PINCONFIG.val))
print("shiftconfig", hex(regs.SHIFTCONFIG.val))

#regs.PIN.val = 0x0
#regs.PIN.val = 0x2
# auto_cs OR pin_cs

#p.write32(spi + 0x150, 0x80c07)
#p.write32(spi + 0x150, 0x88c07)
print(hex(p.read32(spi + 0x150)))

#p.write32(spi + 0x160, 0)
p.write32(spi + 0x160, 0xfff0020)
p.write32(spi + 0x168, 0xffffb20)
#p.write32(spi + 0x164, 0x06000210)
#p.write32(spi + 0x180, 0x02000000)
#p.write32(spi + 0x18c, 0x500)
#regs.INTER_DLY2 = 0x20000001

p.write32(spi + 0x200, 0x0010)
print("pinconfig", hex(regs.PINCFG.val))
print("shiftconfig", hex(regs.SHIFTCFG.val))

p.write32(spi + 0x3c, 0xffffffff)

regs.PINCONFIG.val = 0x002
regs.PINCONFIG.val = 0x200

regs.PINCFG.val = 0x002
regs.PINCFG.val = 0x200

#p.write32(0x28e0380bc, 0x80100000)
#p.write32(0x28e0380c4, 0x80100000)

data = b"Asahi Linux"
data = b"\xff\xff\xff\xff\x00\x00\xff\xff"

for i in range(2):
for j in data:
regs.TXDATA.val = j
regs.TXDATA.val = j | 0xffffff00
regs.RXCNT.val = len(data)
regs.TXCNT.val = len(data)

regs.STATUS.val = 0xffffffff
regs.ISTATUS1.val = 0xffffffff
regs.ISTATUS2.val = 0xffffffff
regs.IF_XFER.val = 0xffffffff
regs.IF_FIFO.val = 0xffffffff

regs.PIN.val = 0x0
regs.CTRL.val = 0x1
Expand All @@ -137,10 +83,10 @@ def try_all_bits():

i = 0
while regs.TXCNT.val != 0:
print(f"{regs.TXCNT.val:#x} {regs.FIFO_STAT.reg} {regs.STATUS.val:#x} {regs.ISTATUS2.val:#x} {p.read32(spi + 0x134):#x}")
print(f"{regs.TXCNT.val:#x} {regs.FIFOSTAT.reg} {regs.STATUS.val:#x} {regs.IF_FIFO.val:#x} {p.read32(spi + 0x134):#x}")
regs.STATUS.val = 0xffffffff
regs.ISTATUS1.val = 0xffffffff
regs.ISTATUS2.val = 0xffffffff
regs.IF_XFER.val = 0xffffffff
regs.IF_FIFO.val = 0xffffffff
#regs.CTRL.val = 0x0
#time.sleep(0.1)
#regs.CTRL.val = 0x1[
Expand All @@ -151,32 +97,21 @@ def try_all_bits():
if i > 0x100:
break
time.sleep(0.001)
print(f"{regs.RXCNT.val:#x} {regs.FIFO_STAT.reg} {regs.STATUS.val:#x} {regs.ISTATUS2.val:#x}")
print(f"{regs.RXCNT.val:#x} {regs.FIFOSTAT.reg} {regs.STATUS.val:#x} {regs.IF_FIFO.val:#x}")
regs.STATUS.val = 0xffffffff
regs.ISTATUS1.val = 0xffffffff
regs.ISTATUS2.val = 0xffffffff
regs.IF_XFER.val = 0xffffffff
regs.IF_FIFO.val = 0xffffffff

mon.poll()

while regs.FIFO_STAT.reg.LEVEL_RX:
while regs.FIFOSTAT.reg.LEVEL_RX:
print("RX", hex(regs.RXDATA.val))

regs.CTRL.val = 0

m.complete()
m.show()

def poll(count=1000):
lval = None
for i in range(count):
pins = 0x35, 0x36, 0x37
vals = [p.read32(gpio + 4 * pin) & 1 for pin in pins]
if vals != lval:
print(f"{i:6d}: {vals}")
lval = vals

mon.poll()

#run_shell(globals(), msg="Have fun!")


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