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prims: do some cleanups #295

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Commits on Jan 16, 2021

  1. prims: delete some old verilog files

    Signed-off-by: Austin Seipp <aseipp@pobox.com>
    thoughtpolice committed Jan 16, 2021
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  2. prims: remove deprecated Icarus Verilog workarounds

    Icarus seems to support the 'generate' constructs used here for BRAMs,
    so there's no need to use this workaround anymore.
    
    Signed-off-by: Austin Seipp <aseipp@pobox.com>
    thoughtpolice committed Jan 16, 2021
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  3. prims: consolidate vivado/generic Verilog primitives

    The Verilog primitives for Vivado are identical to the generic
    primitives for all synthesis tools, except they have some Verilog
    annotations for the clocking and RAM primitives to use the right
    underlying logic. So all of these can be consolidated by just using
    `ifdef appropriately. Do this, and remove all the copies.
    
    Signed-off-by: Austin Seipp <aseipp@pobox.com>
    thoughtpolice committed Jan 16, 2021
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