Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Fix tests for iverilog v11 (SFT deprecated warning) #560

Merged
merged 9 commits into from
Jun 9, 2023
52 changes: 37 additions & 15 deletions src/exec/bsc_build_vsim_iverilog
Original file line number Diff line number Diff line change
Expand Up @@ -127,14 +127,24 @@ if [ -n "$BSC_OTHER_ARGUMENTS" ]; then
exit 1
fi

# identify the VPI wrapper C files
BSC_VPI_CFILES=""
for file in $BSC_VPI_FILES; do
case "$file" in \
vpi_wrapper_* | */vpi_wrapper_* ) \
BSC_VPI_CFILES="$BSC_VPI_CFILES ${file%%.o}.c" ;;
esac
done
# create SFT for iverilog older than v11 (only v10 supported)
# v11 and later use the vpi files directly
if echo "$(iverilog -V 2>/dev/null | head -n 1)" | grep -q "Icarus Verilog version 10."; then
CREATESFT="yes"
else
CREATESFT="no"
fi

if [ "$CREATESFT" = "yes" ]; then
# identify the VPI wrapper C files
BSC_VPI_CFILES=""
for file in $BSC_VPI_FILES; do
case "$file" in \
vpi_wrapper_* | */vpi_wrapper_* ) \
BSC_VPI_CFILES="$BSC_VPI_CFILES ${file%%.o}.c" ;;
esac
done
fi

# build VPI module if needed
if [ -n "$BSC_VPI_FILES" ]; then
Expand All @@ -150,7 +160,10 @@ if [ -n "$BSC_VPI_FILES" ]; then
then
CXX=c++
fi
VPI_LINK="-m./directc_$BSC_TOPLEVEL_MODULE.so directc_$BSC_TOPLEVEL_MODULE.sft"
VPI_LINK="-m./directc_$BSC_TOPLEVEL_MODULE.so"
if [ "$CREATESFT" = "yes" ]; then
VPI_LINK="$VPI_LINK directc_$BSC_TOPLEVEL_MODULE.sft"
fi
LDFLAGS="$LDFLAGS $BSC_LDFLAGS"
SHARED=`$BLUESPECDIR/exec/platform.sh c++_shared_flags`
if [ "$VERBOSE" = "yes" ]; then
Expand All @@ -160,26 +173,35 @@ if [ -n "$BSC_VPI_FILES" ]; then
CXX_VERBOSE=""
fi
$CXX $CXX_VERBOSE $LDFLAGS $SHARED -o directc_$BSC_TOPLEVEL_MODULE.so -Wl,-rpath,$BLUESPECDIR/VPI -L$BLUESPECDIR/VPI $BSC_VPI_FILES -lbdpi $BSC_C_LIB_PATH $BSC_C_LIBS $BSC_CLINK_OPTS
if [ -n "$BSC_VPI_CFILES" ]; then
grep "/* sft:" $BSC_VPI_CFILES | cut -d' ' -f3-6 > directc_$BSC_TOPLEVEL_MODULE.sft
else
touch directc_$BSC_TOPLEVEL_MODULE.sft
if [ "$CREATESFT" = "yes" ]; then
if [ -n "$BSC_VPI_CFILES" ]; then
grep "/* sft:" $BSC_VPI_CFILES | cut -d' ' -f3-6 > directc_$BSC_TOPLEVEL_MODULE.sft
else
touch directc_$BSC_TOPLEVEL_MODULE.sft
fi
fi
else
VPI_LINK=""
fi

if [ "$CREATESFT" = "yes" ]; then
VPI_LIBPATH=""
else
VPI_LIBPATH="-L$BLUESPECDIR/VPI"
fi


# path to Verilog files
VSIM_PATH_FLAGS=$BSC_VERILOG_DIRS

# compile Verilog files
if [ "$VERBOSE" = "yes" ]; then
IV_VERBOSE="-v"
echo "exec: iverilog -v -o $BSC_SIM_EXECUTABLE -Wall $VSIM_PATH_FLAGS $BSC_VSIM_FLAGS -DTOP=$BSC_TOPLEVEL_MODULE $BSC_VERILOG_DEFS $BSC_VERILOG_OPTS $VPI_LINK $BSC_VERILOG_FILES"
echo "exec: iverilog -v -o $BSC_SIM_EXECUTABLE -Wall $VSIM_PATH_FLAGS $BSC_VSIM_FLAGS -DTOP=$BSC_TOPLEVEL_MODULE $VPI_LIBPATH $BSC_VERILOG_DEFS $BSC_VERILOG_OPTS $VPI_LINK $BSC_VERILOG_FILES"
else
IV_VERBOSE=""
fi
iverilog $IV_VERBOSE -o $BSC_SIM_EXECUTABLE -Wall $VSIM_PATH_FLAGS $BSC_VSIM_FLAGS -DTOP=$BSC_TOPLEVEL_MODULE $BSC_VERILOG_DEFS $BSC_VERILOG_OPTS $VPI_LINK $BSC_VERILOG_FILES
iverilog $IV_VERBOSE -o $BSC_SIM_EXECUTABLE -Wall $VSIM_PATH_FLAGS $BSC_VSIM_FLAGS -DTOP=$BSC_TOPLEVEL_MODULE $VPI_LIBPATH $BSC_VERILOG_DEFS $BSC_VERILOG_OPTS $VPI_LINK $BSC_VERILOG_FILES
status=$?
if [ "$status" != "0" ]; then
echo "ERROR: cannot compile Verilog files" >&2
Expand Down
9 changes: 4 additions & 5 deletions testsuite/bsc.options/options.exp
Original file line number Diff line number Diff line change
Expand Up @@ -287,13 +287,12 @@ if { $vtest == 1 } {
set filtfile "$rawfile.filtered"
set ere {-e /WARNING:\ IVerilog/d -e /not\ guaranteed/d}
# iverilog 10.1 has spurious warnings
if { $verilog_compiler == "iverilog" && $verilog_compiler_version == "10.1" } {
if { $verilog_compiler == "iverilog" &&
[regexp {^\d+\.\d+} $verilog_compiler_version majmin] &&
10.0 < $majmin && $majmin < 10.2
Vekhir marked this conversation as resolved.
Show resolved Hide resolved
} {
append ere { -e {/inherits dimensions from var/d}}
}
# Silence deprication warning in iverilog 11.0 for now
if { $verilog_compiler == "iverilog" && $verilog_compiler_version == "11.0" } {
append ere { -e {/SFT files are deprecated/d}}
}
sed $rawfile $filtfile $ere {}
compare_file $filtfile empty.expected
}
Expand Down