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UD use wrong operand types and wrong instruction name #51

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Kashio opened this issue Apr 25, 2023 · 1 comment
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UD use wrong operand types and wrong instruction name #51

Kashio opened this issue Apr 25, 2023 · 1 comment
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@Kashio
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Kashio commented Apr 25, 2023

Right now UD encoded with opcode 0F B9 doesn't have any operand types.
According to the intel docs:

0F B9 /r UD1 r32, r/m32 RM Valid Valid Raise invalid opcode exception.

The instruction should use the v operand type according to my testing against objdump which is defined as:

Word or doubleword, depending on operand-size attribute (for example, INC (40), PUSH (50)).

Also the instruction mnemonic is defined as UD1 instead of UD

Kashio added a commit to Kashio/x86reference that referenced this issue Apr 25, 2023
Kashio added a commit to Kashio/x86reference that referenced this issue Apr 25, 2023
Kashio added a commit to Kashio/x86reference that referenced this issue Apr 25, 2023
@BarebitOpenSource
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Yes, it was undocumented in older manuals, it should be corrected now. However, the operands are:

UD1 r32, r/m32

So it should use d operand type (Doubleword, regardless of operand-size attribute). Actually the real operand size doesn't matter here because the operands are not used anyway: "Other than raising the invalid opcode exception, this instruction has no effect on processor state or memory".

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