ArchLab

Lab for Digital Design and Computer Architecture Spring 2022 (252-0028-00L) (ETH).

Name		Name	Last commit message	Last commit date
Latest commit History 12 Commits
Lab2-Mapping-Your-Circuit-to-FPGA		Lab2-Mapping-Your-Circuit-to-FPGA
Lab3-Verilog-for-Combinatorial-Circuits		Lab3-Verilog-for-Combinatorial-Circuits
Lab4-Finite-State-Machines		Lab4-Finite-State-Machines
Lab5-Implementing-an-ALU		Lab5-Implementing-an-ALU
Lab6-Testing-the-ALU		Lab6-Testing-the-ALU
Lab7-Writing-Assembly-Code		Lab7-Writing-Assembly-Code
Lab8-Full -System-Integration(Part I)		Lab8-Full -System-Integration(Part I)
Lab8-Full -System-Integration(Part II)		Lab8-Full -System-Integration(Part II)
README.md		README.md

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