Add Sipeed Tangnano9k and Tangnano20k boards

[yrabbit]

Necessary changes have been made to support these two boards with GOWIN chips, but still WIP.

[yrabbit]

But I'm stuck on the fact that iverilog doesn't like registers being declared after they are used.
Although it's possible that I'm doing something wrong. Although in processor files registers are actually described much later than use:

https://github.com/yrabbit/learn-fpga/blob/5bb5c5e5490d31366e41e16d8b5822a62d70254a/FemtoRV/RTL/PROCESSOR/femtorv32_quark.v#L63

https://github.com/yrabbit/learn-fpga/blob/5bb5c5e5490d31366e41e16d8b5822a62d70254a/FemtoRV/RTL/PROCESSOR/femtorv32_quark.v#L198

~/src/learn-fpga/FemtoRV$ make TANGNANO9K
BOARD=tangnano9k TOOLS/make_config.sh -DTANGNANO9K
./PROCESSOR/femtorv32_quark.v:63: error: Unable to bind wire/reg/memory `instr['sd11:'sd7]' in `FemtoRV32'
./PROCESSOR/femtorv32_quark.v:198:      : A symbol with that name was declared here. Check for declaration after use.
./PROCESSOR/femtorv32_quark.v:63: error: Unable to elaborate r-value: instr['sd11:'sd7]
./PROCESSOR/femtorv32_quark.v:68: error: Unable to bind wire/reg/memory `instr['sd14:'sd12]' in `FemtoRV32'
./PROCESSOR/femtorv32_quark.v:198:      : A symbol with that name was declared here. Check for declaration after use.
./PROCESSOR/femtorv32_quark.v:68: error: Unable to elaborate r-value: (8'd1)<<(instr['sd14:'sd12])
./PROCESSOR/femtorv32_quark.v:71: error: Unable to bind wire/reg/memory `instr['sd31]' in `FemtoRV32'
./PROCESSOR/femtorv32_quark.v:198:      : A symbol with that name was declared here. Check for declaration after use.
./PROCESSOR/femtorv32_quark.v:71: error: Unable to bind wire/reg/memory `instr['sd30:'sd12]' in `FemtoRV32'
./PROCESSOR/femtorv32_quark.v:198:      : A symbol with that name was declared here. Check for declaration after use.
./PROCESSOR/femtorv32_quark.v:72: error: Unable to bind wire/reg/memory `instr['sd31]' in `FemtoRV32'
./PROCESSOR/femtorv32_quark.v:198:      : A symbol with that name was declared here. Check for declaration after use.
./PROCESSOR/femtorv32_quark.v:72: error: Concatenation/replication may not have zero width in this context.
./PROCESSOR/femtorv32_quark.v:72: error: Unable to bind wire/reg/memory `instr['sd30:'sd20]' in `FemtoRV32'
./PROCESSOR/femtorv32_quark.v:198:      : A symbol with that name was declared here. Check for declaration after use.
./PROCESSOR/femtorv32_quark.v:72: error: Concatenation/replication may not have zero width in this context.
./PROCESSOR/femtorv32_quark.v:72: error: Unable to elaborate r-value: {{'sd21{instr['sd31]}}, instr['sd30:'sd20]}
./PROCESSOR/femtorv32_quark.v:74: error: Unable to bind wire/reg/memory `instr['sd31]' in `FemtoRV32'
./PROCESSOR/femtorv32_quark.v:198:      : A symbol with that name was declared here. Check for declaration after use.