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Merged xmrig v6.20.0
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C3Pool committed Jul 7, 2023
1 parent 7343157 commit c4dc0b4
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9 changes: 9 additions & 0 deletions CHANGELOG.md
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@@ -1,3 +1,12 @@
# v6.20.0
- Added new ARM CPU names.
- [#2394](https://github.com/xmrig/xmrig/pull/2394) Added new CMake options `ARM_V8` and `ARM_V7`.
- [#2830](https://github.com/xmrig/xmrig/pull/2830) Added API rebind polling.
- [#2927](https://github.com/xmrig/xmrig/pull/2927) Fixed compatibility with hwloc 1.11.x.
- [#3060](https://github.com/xmrig/xmrig/pull/3060) Added x86 to `README.md`.
- [#3236](https://github.com/xmrig/xmrig/pull/3236) Fixed: receive CUDA loader error on Linux too.
- [#3290](https://github.com/xmrig/xmrig/pull/3290) Added [Zephyr](https://www.zephyrprotocol.com/) coin support for solo mining.

# v6.19.3
- [#3245](https://github.com/xmrig/xmrig/issues/3245) Improved algorithm negotiation for donation rounds by sending extra information about current mining job.
- [#3254](https://github.com/xmrig/xmrig/pull/3254) Tweaked auto-tuning for Intel CPUs.
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3 changes: 2 additions & 1 deletion CMakeLists.txt
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Expand Up @@ -36,7 +36,8 @@ option(WITH_SECURE_JIT "Enable secure access to JIT memory" OFF)
option(WITH_DMI "Enable DMI/SMBIOS reader" ON)

option(BUILD_STATIC "Build static binary" OFF)
option(ARM_TARGET "Force use specific ARM target 8 or 7" 0)
option(ARM_V8 "Force ARMv8 (64 bit) architecture, use with caution if automatic detection fails, but you sure it may work" OFF)
option(ARM_V7 "Force ARMv7 (32 bit) architecture, use with caution if automatic detection fails, but you sure it may work" OFF)
option(HWLOC_DEBUG "Enable hwloc debug helpers and log" OFF)


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2 changes: 1 addition & 1 deletion README.md
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Expand Up @@ -10,7 +10,7 @@
XMRig is a high performance, open source, cross platform RandomX, KawPow, CryptoNight and [GhostRider](https://github.com/xmrig/xmrig/tree/master/src/crypto/ghostrider#readme) unified CPU/GPU miner and [RandomX benchmark](https://xmrig.com/benchmark). Official binaries are available for Windows, Linux, macOS and FreeBSD.

## Mining backends
- **CPU** (x64/ARMv7/ARMv8)
- **CPU** (x86/x64/ARMv7/ARMv8)
- **OpenCL** for AMD GPUs.
- **CUDA** for NVIDIA GPUs via external [CUDA plugin](https://github.com/C3Pool/xmrig-cuda).

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6 changes: 6 additions & 0 deletions cmake/cpu.cmake
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Expand Up @@ -29,6 +29,12 @@ else()
set(WITH_VAES OFF)
endif()

if (ARM_V8)
set(ARM_TARGET 8)
elseif (ARM_V7)
set(ARM_TARGET 7)
endif()

if (NOT ARM_TARGET)
if (CMAKE_SYSTEM_PROCESSOR MATCHES "^(aarch64|arm64|armv8-a)$")
set(ARM_TARGET 8)
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8 changes: 4 additions & 4 deletions src/backend/cpu/Cpu.h
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@@ -1,6 +1,6 @@
/* XMRig
* Copyright (c) 2018-2020 SChernykh <https://github.com/SChernykh>
* Copyright (c) 2016-2020 XMRig <https://github.com/xmrig>, <support@xmrig.com>
* Copyright (c) 2018-2023 SChernykh <https://github.com/SChernykh>
* Copyright (c) 2016-2023 XMRig <https://github.com/xmrig>, <support@xmrig.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
Expand Down Expand Up @@ -37,7 +37,7 @@ class Cpu
};


} /* namespace xmrig */
} // namespace xmrig


#endif /* XMRIG_CPU_H */
#endif // XMRIG_CPU_H
18 changes: 15 additions & 3 deletions src/backend/cpu/interfaces/ICpuInfo.h
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@@ -1,6 +1,6 @@
/* XMRig
* Copyright (c) 2018-2021 SChernykh <https://github.com/SChernykh>
* Copyright (c) 2016-2021 XMRig <support@xmrig.com>
* Copyright (c) 2018-2023 SChernykh <https://github.com/SChernykh>
* Copyright (c) 2016-2023 XMRig <support@xmrig.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
Expand All @@ -26,6 +26,12 @@
#include "crypto/common/Assembly.h"


#ifdef XMRIG_FEATURE_HWLOC
using hwloc_const_bitmap_t = const struct hwloc_bitmap_s *;
using hwloc_topology_t = struct hwloc_topology *;
#endif


namespace xmrig {


Expand Down Expand Up @@ -116,10 +122,16 @@ class ICpuInfo
virtual size_t threads() const = 0;
virtual Vendor vendor() const = 0;
virtual uint32_t model() const = 0;

# ifdef XMRIG_FEATURE_HWLOC
virtual bool membind(hwloc_const_bitmap_t nodeset) = 0;
virtual const std::vector<uint32_t> &nodeset() const = 0;
virtual hwloc_topology_t topology() const = 0;
# endif
};


} /* namespace xmrig */
} // namespace xmrig


#endif // XMRIG_CPUINFO_H
11 changes: 5 additions & 6 deletions src/backend/cpu/platform/BasicCpuInfo.h
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@@ -1,7 +1,7 @@
/* XMRig
* Copyright (c) 2017-2019 XMR-Stak <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
* Copyright (c) 2018-2021 SChernykh <https://github.com/SChernykh>
* Copyright (c) 2016-2021 XMRig <support@xmrig.com>
* Copyright (c) 2018-2023 SChernykh <https://github.com/SChernykh>
* Copyright (c) 2016-2023 XMRig <support@xmrig.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
Expand Down Expand Up @@ -72,11 +72,10 @@ class BasicCpuInfo : public ICpuInfo
# endif
}

protected:
Arch m_arch = ARCH_UNKNOWN;
bool m_jccErratum = false;
char m_brand[64 + 6]{};
size_t m_threads;
size_t m_threads = 0;
std::vector<int32_t> m_units;
Vendor m_vendor = VENDOR_UNKNOWN;

Expand All @@ -94,7 +93,7 @@ class BasicCpuInfo : public ICpuInfo
};


} /* namespace xmrig */
} // namespace xmrig


#endif /* XMRIG_BASICCPUINFO_H */
#endif // XMRIG_BASICCPUINFO_H
31 changes: 11 additions & 20 deletions src/backend/cpu/platform/HwlocCpuInfo.cpp
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@@ -1,6 +1,6 @@
/* XMRig
* Copyright (c) 2018-2021 SChernykh <https://github.com/SChernykh>
* Copyright (c) 2016-2021 XMRig <support@xmrig.com>
* Copyright (c) 2018-2023 SChernykh <https://github.com/SChernykh>
* Copyright (c) 2016-2023 XMRig <support@xmrig.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
Expand Down Expand Up @@ -36,27 +36,22 @@
#include "base/io/log/Log.h"


namespace xmrig {


uint32_t HwlocCpuInfo::m_features = 0;


static inline bool isCacheObject(hwloc_obj_t obj)
#if HWLOC_API_VERSION < 0x20000
static inline int hwloc_obj_type_is_cache(hwloc_obj_type_t type)
{
# if HWLOC_API_VERSION >= 0x20000
return hwloc_obj_type_is_cache(obj->type);
# else
return obj->type == HWLOC_OBJ_CACHE;
# endif
return type == HWLOC_OBJ_CACHE;
}
#endif


namespace xmrig {


template <typename func>
static inline void findCache(hwloc_obj_t obj, unsigned min, unsigned max, func lambda)
{
for (size_t i = 0; i < obj->arity; i++) {
if (isCacheObject(obj->children[i])) {
if (hwloc_obj_type_is_cache(obj->children[i]->type)) {
const unsigned depth = obj->children[i]->attr->cache.depth;
if (depth < min || depth > max) {
continue;
Expand Down Expand Up @@ -174,10 +169,6 @@ xmrig::HwlocCpuInfo::HwlocCpuInfo()
m_packages = countByType(m_topology, HWLOC_OBJ_PACKAGE);

if (m_nodes > 1) {
if (hwloc_topology_get_support(m_topology)->membind->set_thisthread_membind) {
m_features |= SET_THISTHREAD_MEMBIND;
}

m_nodeset.reserve(m_nodes);
hwloc_obj_t node = nullptr;

Expand Down Expand Up @@ -322,7 +313,7 @@ void xmrig::HwlocCpuInfo::processTopLevelCache(hwloc_obj_t cache, const Algorith
if (cache->attr->cache.depth == 3) {
for (size_t i = 0; i < cache->arity; ++i) {
hwloc_obj_t l2 = cache->children[i];
if (!isCacheObject(l2) || l2->attr == nullptr) {
if (!hwloc_obj_type_is_cache(l2->type) || l2->attr == nullptr) {
continue;
}

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43 changes: 14 additions & 29 deletions src/backend/cpu/platform/HwlocCpuInfo.h
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
/* XMRig
* Copyright (c) 2018-2021 SChernykh <https://github.com/SChernykh>
* Copyright (c) 2016-2021 XMRig <support@xmrig.com>
* Copyright (c) 2018-2023 SChernykh <https://github.com/SChernykh>
* Copyright (c) 2016-2023 XMRig <support@xmrig.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
Expand All @@ -21,12 +21,9 @@


#include "backend/cpu/platform/BasicCpuInfo.h"
#include "base/tools/Object.h"


using hwloc_const_bitmap_t = const struct hwloc_bitmap_s *;
using hwloc_obj_t = struct hwloc_obj *;
using hwloc_topology_t = struct hwloc_topology *;
using hwloc_obj_t = struct hwloc_obj *;


namespace xmrig {
Expand All @@ -37,39 +34,27 @@ class HwlocCpuInfo : public BasicCpuInfo
public:
XMRIG_DISABLE_COPY_MOVE(HwlocCpuInfo)


enum Feature : uint32_t {
SET_THISTHREAD_MEMBIND = 1
};


HwlocCpuInfo();
~HwlocCpuInfo() override;

static inline bool hasFeature(Feature feature) { return m_features & feature; }

inline const std::vector<uint32_t> &nodeset() const { return m_nodeset; }
inline hwloc_topology_t topology() const { return m_topology; }

bool membind(hwloc_const_bitmap_t nodeset);

protected:
bool membind(hwloc_const_bitmap_t nodeset) override;
CpuThreads threads(const Algorithm &algorithm, uint32_t limit) const override;

inline const char *backend() const override { return m_backend; }
inline size_t cores() const override { return m_cores; }
inline size_t L2() const override { return m_cache[2]; }
inline size_t L3() const override { return m_cache[3]; }
inline size_t nodes() const override { return m_nodes; }
inline size_t packages() const override { return m_packages; }
inline const char *backend() const override { return m_backend; }
inline const std::vector<uint32_t> &nodeset() const override { return m_nodeset; }
inline hwloc_topology_t topology() const override { return m_topology; }
inline size_t cores() const override { return m_cores; }
inline size_t L2() const override { return m_cache[2]; }
inline size_t L3() const override { return m_cache[3]; }
inline size_t nodes() const override { return m_nodes; }
inline size_t packages() const override { return m_packages; }

private:
CpuThreads allThreads(const Algorithm &algorithm, uint32_t limit) const;
void processTopLevelCache(hwloc_obj_t cache, const Algorithm &algorithm, CpuThreads &threads, size_t limit) const;
void setThreads(size_t threads);

static uint32_t m_features;

char m_backend[20] = { 0 };
hwloc_topology_t m_topology = nullptr;
size_t m_cache[5] = { 0 };
Expand All @@ -80,7 +65,7 @@ class HwlocCpuInfo : public BasicCpuInfo
};


} /* namespace xmrig */
} // namespace xmrig


#endif /* XMRIG_HWLOCCPUINFO_H */
#endif // XMRIG_HWLOCCPUINFO_H
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