Skip to content
View ChandulaNethmal's full-sized avatar
💭
I may be slow to respond.
💭
I may be slow to respond.
Block or Report

Block or report ChandulaNethmal

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Please don't include any personal information such as legal names or email addresses. Maximum 100 characters, markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Popular repositories Loading

  1. Pi_Camera Pi_Camera Public

    Python 7 4

  2. Implemet-a-UART-link-on-FPGA-with-verilog Implemet-a-UART-link-on-FPGA-with-verilog Public

    Implement a UART(Universal Asynchronous Receiver Transmitter) link on an Altera (now Intel) DE2 115 development board with cyclone IV FPGA using verilog HDL.

    Verilog 3

  3. Processor-Design-and-Implementation-on-a-FPGA Processor-Design-and-Implementation-on-a-FPGA Public

    Overview The objective of this project is to design object specified microprocessor and a Central Processing Unit in order to downscale an image. As steps of above task, we have to simulate it usin…

    Verilog 2 1

  4. UART-communication-Link-on-a-FPGA-using-Verilog-HDL UART-communication-Link-on-a-FPGA-using-Verilog-HDL Public

    This post is regarding a HDL implementation of a UART(Universal Asynchronous Receiver Transmitter) for one of our university fourth semester projects.For the project we were supposed to implement a…

    Verilog 1 1

  5. git_ex git_ex Public

    Git_tutorial

    1

  6. Accident-Alerting-System-Using-GSM-shield Accident-Alerting-System-Using-GSM-shield Public

    This was a kind of basic project I have involved with one of my friend who was studying at a engineering education Institute. The target was an accident alerting system for a vehicle. When the car …

    C++ 1