Fixed bug #1127.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/stable_20.3.x@13887 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
ChibiOS · Oct 13, 2020 · 8e43cf8 · 8e43cf8
1 parent 3fe5154
commit 8e43cf8
Show file tree

Hide file tree

Showing 2 changed files with 12 additions and 35 deletions.
diff --git a/os/hal/ports/STM32/STM32H7xx/stm32_rcc.h b/os/hal/ports/STM32/STM32H7xx/stm32_rcc.h
@@ -1,5 +1,5 @@
 /*
-    ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
+    ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio
 
     Licensed under the Apache License, Version 2.0 (the "License");
     you may not use this file except in compliance with the License.
@@ -694,25 +694,25 @@
  *
  * @api
  */
-#define rccEnableETH(lp) rccEnableAHB1(RCC_AHB1ENR_ETHMACEN |               \
-                                       RCC_AHB1ENR_ETHMACTXEN |             \
-                                       RCC_AHB1ENR_ETHMACRXEN, lp)
+#define rccEnableETH(lp) rccEnableAHB1(RCC_AHB1ENR_ETH1MACEN |               \
+                                       RCC_AHB1ENR_ETH1TXEN |             \
+                                       RCC_AHB1ENR_ETH1RXEN, lp)
 
 /**
  * @brief   Disables the ETH peripheral clock.
  *
  * @api
  */
-#define rccDisableETH() rccDisableAHB1(RCC_AHB1ENR_ETHMACEN |            \
-                                          RCC_AHB1ENR_ETHMACTXEN |          \
-                                          RCC_AHB1ENR_ETHMACRXEN)
+#define rccDisableETH() rccDisableAHB1(RCC_AHB1ENR_ETH1MACEN |            \
+                                          RCC_AHB1ENR_ETH1TXEN |          \
+                                          RCC_AHB1ENR_ETH1RXEN)
 
 /**
  * @brief   Resets the ETH peripheral.
  *
  * @api
  */
-#define rccResetETH() rccResetAHB1(RCC_AHB1RSTR_ETHMACRST)
+#define rccResetETH() rccResetAHB1(RCC_AHB1RSTR_ETH1MACRST)
 /** @} */
 
 /**
@@ -1013,21 +1013,21 @@
  *
  * @api
  */
-#define rccEnableSDMMC2(lp) rccEnableAHB3(RCC_AHB3ENR_SDMMC2EN, lp)
+#define rccEnableSDMMC2(lp) rccEnableAHB2(RCC_AHB2ENR_SDMMC2EN, lp)
 
 /**
  * @brief   Disables the SDMMC2 peripheral clock.
  *
  * @api
  */
-#define rccDisableSDMMC2() rccDisableAHB3(RCC_AHB3ENR_SDMMC2EN)
+#define rccDisableSDMMC2() rccDisableAHB2(RCC_AHB2ENR_SDMMC2EN)
 
 /**
  * @brief   Resets the SDMMC2 peripheral.
  *
  * @api
  */
-#define rccResetSDMMC2() rccResetAHB3(RCC_AHB3RSTR_SDMMC2RST)
+#define rccResetSDMMC2() rccResetAHB2(RCC_AHB2RSTR_SDMMC2RST)
 /** @} */
 
 /**
@@ -1689,30 +1689,6 @@
 #define rccResetUART8() rccResetAPB1L(RCC_APB1LRSTR_UART8RST)
 /** @} */
 
-/**
- * @brief   Enables the LPUART1 peripheral clock.
- *
- * @param[in] lp        low power enable flag
- *
- * @api
- */
-#define rccEnableLPUART1(lp) rccEnableAPB4(RCC_APB4ENR_LPUART1EN, lp)
-
-/**
- * @brief   Disables the LPUART1 peripheral clock.
- *
- * @api
- */
-#define rccDisableLPUART1() rccDisableAPB4(RCC_APB4ENR_LPUART1EN)
-
-/**
- * @brief   Resets the LPUART1 peripheral.
- *
- * @api
- */
-#define rccResetLPUART1() rccResetAPB4(RCC_APB4RSTR_LPUART1RST)
-/** @} */
-
 /**
  * @name    LTDC peripheral specific RCC operations
  * @{

diff --git a/readme.txt b/readme.txt
@@ -74,6 +74,7 @@
 *****************************************************************************
 
 *** 20.3.3 ***
+- FIX: Fixed wrong SDMMC RCC macros for STM32H7xx (bug #1127).
 - FIX: Fixed STM32 ADCv3 hangin on initialization (bug #1126).
 - FIX: Fixed I2S-related problems in STM32F4xx registry (bug #1124).
 - FIX: Fixed STM32 EXTIv1 driver unable to enable/disable fixed lines