CircuitVerse · Shivansh2407 · Apr 5, 2021 · Feb 15, 2021 · Feb 16, 2021 · Feb 22, 2021
diff --git a/docs/binary-algebra/addition.md b/docs/binary-algebra/addition.md
@@ -46,3 +46,4 @@ In the above example, for units place gives 1 as the submission of 1 and 0, wher
 1 1 0   (6)
 -----
 ```
+
diff --git a/docs/comb-ssi/logic-gates.md b/docs/comb-ssi/logic-gates.md
@@ -222,3 +222,4 @@ endmodule
 ```
 
 {% include gates.html %}
+
diff --git a/docs/comb-ssi/universal-gates.md b/docs/comb-ssi/universal-gates.md
@@ -148,3 +148,6 @@ F = (A NOR (B NOR B)) NOR ((C NOR C) NOR D)
 Notice that there are input elements that are present in the negative form, namely `B'` and `C'`. You can represent them by using the NOR gate in order to realise the [NOT gate](https://learn.circuitverse.org/docs/universal_gates.html#implementing-not-gate).
 
 <iframe width="600px" height="300px" src="https://circuitverse.org/simulator/embed/97663" id="projectPreview" scrolling="no" webkitAllowFullScreen mozAllowFullScreen allowFullScreen></iframe>
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+
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diff --git a/docs/logic-design/canonical.md b/docs/logic-design/canonical.md
@@ -365,3 +365,4 @@ The following methods can be used to simplify the the Boolean function:
 
 1. The [Karnaugh-map](https://learn.circuitverse.org/docs/maps.html) or K-map method.
 1. The [NAND gate method](https://learn.circuitverse.org/docs/nand_gate_method.html).
+
diff --git a/docs/logic-design/functional-description.md b/docs/logic-design/functional-description.md
@@ -33,3 +33,5 @@ This combinational circuit has ‘n’ input variables and ‘m’ outputs. Each
 1.  Formulate the Truth table. If there are ‘n’ input variables, then there will be 2n possible combinations. For each combination of input, find the output values.   
 1.  Find the Boolean expressions for each output. If necessary, simplify those expressions.   
 1.  Implement the above Boolean expressions corresponding to each output by using Logic gates.
+
+
diff --git a/docs/logic-design/kmaps.md b/docs/logic-design/kmaps.md
@@ -186,3 +186,6 @@ Both groupings have the same size and are the same dimension. However, upon reac
 This illustrates the idea that this is a greedy algorithm, and does not always return the most simplified SOP expression. In later sections, algorithms illustrating a globally optimal algorithm will be discussed.
 
 {% include kmap.html %}
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+
+{
diff --git a/docs/seq-lsi/fpga.md b/docs/seq-lsi/fpga.md
@@ -51,3 +51,26 @@ FPGA are so versatile than even full microprocessors can be implemented in them,
 	id="projectPreview" scrolling="no"
 	webkitAllowFullScreen mozAllowFullScreen allowFullScreen>
 </iframe>
+
+{:.quiz}
+1. Configurable Logic Blocks are surrounded by a system of programmable interconnects is known as
+   1. fabric
+   * chips
+   * flip-flop
+   * finite 
+2. What is the function of D flip flop in FPGA?
-2. What is the function of D flip flop in FPGA?
+2. What is the function of D flip flop in FPGA ?
-2. What is the function of D flip flop in FPGA?
+2. What is the function of D flip flop in FPGA ?
+   1. Store output
+   * Store input
+   * Display output
+   * None
+3. FPGA was invented by `__________`?
+   1. Xilinx
+   * Altera
+   * Actel
+   * Lattice   
+4. FPGAs are `__________` devices.
+   1. Fine-grain
+   * Coarse-grain
+   * Rely-grain
+   * None 
+
diff --git a/docs/seq-lsi/microprocessors.md b/docs/seq-lsi/microprocessors.md
@@ -26,3 +26,4 @@ Microprocessors are general purpose rom-based sequential circuits with a fixed *
 Other combinational and sequential components, such as MUXs, registers and counters are also part of the microprocessor to provide the functionality required by the software, to optimise its execution and to connect to other external components.
 
 One of the first "single-chip" microprocessors is the Intel 4004. Read more about it and other interesting microprocessors and their history in the [IEEE Chip Hall of Fame](https://spectrum.ieee.org/static/chip-hall-of-fame) and the website [Great Microprocessors of the Past and Present](http://www.cpushack.com/CPU/cpu.html) at the CPUSHACK museum.
+
diff --git a/docs/seq-lsi/rom-microcontrollers.md b/docs/seq-lsi/rom-microcontrollers.md
@@ -64,3 +64,5 @@ For FSM which do not exhibit a simple sequence of states, the counter can be rep
 ![MUX based microcontroller](/assets/images/seq/rom_mux.svg)
 
 ROM capacity: $2^N \times (2N+K+\log_2 M)$
+
+