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move xmm code into separate file 2nd try
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WalterBright committed Oct 29, 2011
1 parent 3608cf9 commit 7e5f610
Showing 1 changed file with 0 additions and 52 deletions.
52 changes: 0 additions & 52 deletions src/backend/cod2.c
Expand Up @@ -123,58 +123,6 @@ code *opdouble(elem *e,regm_t *pretregs,unsigned clib)
}
#endif

/***********************************************
* Do simple orthogonal operators for XMM registers.
*/

code *orthxmm(elem *e, regm_t *pretregs)
{ elem *e1 = e->E1;
elem *e2 = e->E2;
tym_t ty1 = tybasic(e1->Ety);
unsigned sz1 = tysize[ty1];
assert(sz1 == 4 || sz1 == 8); // float or double
regm_t retregs = *pretregs & XMMREGS;
code *c = codelem(e1,&retregs,FALSE); // eval left leaf
unsigned reg = findreg(retregs);
regm_t rretregs = XMMREGS & ~retregs;
code *cr = scodelem(e2, &rretregs, retregs, TRUE); // eval right leaf
unsigned rreg = findreg(rretregs);
code *cg = getregs(retregs);
unsigned op;
switch (e->Eoper)
{
case OPadd:
op = 0xF20F58; // ADDSD
if (sz1 == 4) // float
op = 0xF30F58; // ADDSS
break;

case OPmin:
op = 0xF20F5C; // SUBSD
if (sz1 == 4) // float
op = 0xF30F5C; // SUBSS
break;

case OPmul:
op = 0xF20F59; // MULSD
if (sz1 == 4) // float
op = 0xF30F59; // MULSS
break;

case OPdiv:
op = 0xF20F5E; // DIVSD
if (sz1 == 4) // float
op = 0xF30F5E; // DIVSS
break;

default:
assert(0);
}
code *co = gen2(CNIL,op,modregrm(3,reg-XMM0,rreg-XMM0));
co = cat(co,fixresult(e,retregs,pretregs));
return cat4(c,cr,cg,co);
}

/*****************************
* Handle operators which are more or less orthogonal
* ( + - & | ^ )
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