Daniele Parravicini @synthara .
Personal @DanieleParravicini
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Synthara AG
- Zurich, Switzerland
- in/daniele-parravicini
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tflite-micro
tflite-micro PublicForked from tensorflow/tflite-micro
Infrastructure to enable deployment of ML models to low-power resource-constrained embedded targets (including microcontrollers and digital signal processors).
C++
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cve2
cve2 PublicForked from openhwgroup/cve2
The CORE-V CVE2 is a small 32 bit RISC-V CPU core (RV32IMC/EMC) with a two stage pipeline, based on the original zero-riscy work from ETH Zurich and Ibex work from lowRISC.
SystemVerilog
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