/
if_jme.c
3750 lines (3199 loc) · 94.2 KB
/
if_jme.c
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
/*-
* Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice unmodified, this list of conditions, and the following
* disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD: src/sys/dev/jme/if_jme.c,v 1.2 2008/07/18 04:20:48 yongari Exp $
*/
#include "opt_polling.h"
#include "opt_rss.h"
#include "opt_jme.h"
#include <sys/param.h>
#include <sys/endian.h>
#include <sys/kernel.h>
#include <sys/bus.h>
#include <sys/interrupt.h>
#include <sys/malloc.h>
#include <sys/proc.h>
#include <sys/rman.h>
#include <sys/serialize.h>
#include <sys/serialize2.h>
#include <sys/socket.h>
#include <sys/sockio.h>
#include <sys/sysctl.h>
#include <net/ethernet.h>
#include <net/if.h>
#include <net/bpf.h>
#include <net/if_arp.h>
#include <net/if_dl.h>
#include <net/if_media.h>
#include <net/ifq_var.h>
#include <net/toeplitz.h>
#include <net/toeplitz2.h>
#include <net/vlan/if_vlan_var.h>
#include <net/vlan/if_vlan_ether.h>
#include <netinet/in.h>
#include <dev/netif/mii_layer/miivar.h>
#include <dev/netif/mii_layer/jmphyreg.h>
#include <bus/pci/pcireg.h>
#include <bus/pci/pcivar.h>
#include <bus/pci/pcidevs.h>
#include <dev/netif/jme/if_jmereg.h>
#include <dev/netif/jme/if_jmevar.h>
#include "miibus_if.h"
/* Define the following to disable printing Rx errors. */
#undef JME_SHOW_ERRORS
#define JME_CSUM_FEATURES (CSUM_IP | CSUM_TCP | CSUM_UDP)
#ifdef JME_RSS_DEBUG
#define JME_RSS_DPRINTF(sc, lvl, fmt, ...) \
do { \
if ((sc)->jme_rss_debug >= (lvl)) \
if_printf(&(sc)->arpcom.ac_if, fmt, __VA_ARGS__); \
} while (0)
#else /* !JME_RSS_DEBUG */
#define JME_RSS_DPRINTF(sc, lvl, fmt, ...) ((void)0)
#endif /* JME_RSS_DEBUG */
static int jme_probe(device_t);
static int jme_attach(device_t);
static int jme_detach(device_t);
static int jme_shutdown(device_t);
static int jme_suspend(device_t);
static int jme_resume(device_t);
static int jme_miibus_readreg(device_t, int, int);
static int jme_miibus_writereg(device_t, int, int, int);
static void jme_miibus_statchg(device_t);
static void jme_init(void *);
static int jme_ioctl(struct ifnet *, u_long, caddr_t, struct ucred *);
static void jme_start(struct ifnet *);
static void jme_watchdog(struct ifnet *);
static void jme_mediastatus(struct ifnet *, struct ifmediareq *);
static int jme_mediachange(struct ifnet *);
#ifdef DEVICE_POLLING
static void jme_poll(struct ifnet *, enum poll_cmd, int);
#endif
static void jme_serialize(struct ifnet *, enum ifnet_serialize);
static void jme_deserialize(struct ifnet *, enum ifnet_serialize);
static int jme_tryserialize(struct ifnet *, enum ifnet_serialize);
#ifdef INVARIANTS
static void jme_serialize_assert(struct ifnet *, enum ifnet_serialize,
boolean_t);
#endif
static void jme_intr(void *);
static void jme_msix_tx(void *);
static void jme_msix_rx(void *);
static void jme_txeof(struct jme_softc *);
static void jme_rxeof(struct jme_rxdata *, int);
static void jme_rx_intr(struct jme_softc *, uint32_t);
static int jme_msix_setup(device_t);
static void jme_msix_teardown(device_t, int);
static int jme_intr_setup(device_t);
static void jme_intr_teardown(device_t);
static void jme_msix_try_alloc(device_t);
static void jme_msix_free(device_t);
static int jme_intr_alloc(device_t);
static void jme_intr_free(device_t);
static int jme_dma_alloc(struct jme_softc *);
static void jme_dma_free(struct jme_softc *);
static int jme_init_rx_ring(struct jme_rxdata *);
static void jme_init_tx_ring(struct jme_softc *);
static void jme_init_ssb(struct jme_softc *);
static int jme_newbuf(struct jme_rxdata *, struct jme_rxdesc *, int);
static int jme_encap(struct jme_softc *, struct mbuf **);
static void jme_rxpkt(struct jme_rxdata *);
static int jme_rxring_dma_alloc(struct jme_rxdata *);
static int jme_rxbuf_dma_alloc(struct jme_rxdata *);
static void jme_tick(void *);
static void jme_stop(struct jme_softc *);
static void jme_reset(struct jme_softc *);
static void jme_set_msinum(struct jme_softc *);
static void jme_set_vlan(struct jme_softc *);
static void jme_set_filter(struct jme_softc *);
static void jme_stop_tx(struct jme_softc *);
static void jme_stop_rx(struct jme_softc *);
static void jme_mac_config(struct jme_softc *);
static void jme_reg_macaddr(struct jme_softc *, uint8_t[]);
static int jme_eeprom_macaddr(struct jme_softc *, uint8_t[]);
static int jme_eeprom_read_byte(struct jme_softc *, uint8_t, uint8_t *);
#ifdef notyet
static void jme_setwol(struct jme_softc *);
static void jme_setlinkspeed(struct jme_softc *);
#endif
static void jme_set_tx_coal(struct jme_softc *);
static void jme_set_rx_coal(struct jme_softc *);
static void jme_enable_rss(struct jme_softc *);
static void jme_disable_rss(struct jme_softc *);
static void jme_sysctl_node(struct jme_softc *);
static int jme_sysctl_tx_coal_to(SYSCTL_HANDLER_ARGS);
static int jme_sysctl_tx_coal_pkt(SYSCTL_HANDLER_ARGS);
static int jme_sysctl_rx_coal_to(SYSCTL_HANDLER_ARGS);
static int jme_sysctl_rx_coal_pkt(SYSCTL_HANDLER_ARGS);
/*
* Devices supported by this driver.
*/
static const struct jme_dev {
uint16_t jme_vendorid;
uint16_t jme_deviceid;
uint32_t jme_caps;
const char *jme_name;
} jme_devs[] = {
{ PCI_VENDOR_JMICRON, PCI_PRODUCT_JMICRON_JMC250,
JME_CAP_JUMBO,
"JMicron Inc, JMC250 Gigabit Ethernet" },
{ PCI_VENDOR_JMICRON, PCI_PRODUCT_JMICRON_JMC260,
JME_CAP_FASTETH,
"JMicron Inc, JMC260 Fast Ethernet" },
{ 0, 0, 0, NULL }
};
static device_method_t jme_methods[] = {
/* Device interface. */
DEVMETHOD(device_probe, jme_probe),
DEVMETHOD(device_attach, jme_attach),
DEVMETHOD(device_detach, jme_detach),
DEVMETHOD(device_shutdown, jme_shutdown),
DEVMETHOD(device_suspend, jme_suspend),
DEVMETHOD(device_resume, jme_resume),
/* Bus interface. */
DEVMETHOD(bus_print_child, bus_generic_print_child),
DEVMETHOD(bus_driver_added, bus_generic_driver_added),
/* MII interface. */
DEVMETHOD(miibus_readreg, jme_miibus_readreg),
DEVMETHOD(miibus_writereg, jme_miibus_writereg),
DEVMETHOD(miibus_statchg, jme_miibus_statchg),
{ NULL, NULL }
};
static driver_t jme_driver = {
"jme",
jme_methods,
sizeof(struct jme_softc)
};
static devclass_t jme_devclass;
DECLARE_DUMMY_MODULE(if_jme);
MODULE_DEPEND(if_jme, miibus, 1, 1, 1);
DRIVER_MODULE(if_jme, pci, jme_driver, jme_devclass, NULL, NULL);
DRIVER_MODULE(miibus, jme, miibus_driver, miibus_devclass, NULL, NULL);
static const struct {
uint32_t jme_coal;
uint32_t jme_comp;
uint32_t jme_empty;
} jme_rx_status[JME_NRXRING_MAX] = {
{ INTR_RXQ0_COAL | INTR_RXQ0_COAL_TO, INTR_RXQ0_COMP,
INTR_RXQ0_DESC_EMPTY },
{ INTR_RXQ1_COAL | INTR_RXQ1_COAL_TO, INTR_RXQ1_COMP,
INTR_RXQ1_DESC_EMPTY },
{ INTR_RXQ2_COAL | INTR_RXQ2_COAL_TO, INTR_RXQ2_COMP,
INTR_RXQ2_DESC_EMPTY },
{ INTR_RXQ3_COAL | INTR_RXQ3_COAL_TO, INTR_RXQ3_COMP,
INTR_RXQ3_DESC_EMPTY }
};
static int jme_rx_desc_count = JME_RX_DESC_CNT_DEF;
static int jme_tx_desc_count = JME_TX_DESC_CNT_DEF;
static int jme_rx_ring_count = 1;
static int jme_msi_enable = 1;
static int jme_msix_enable = 1;
TUNABLE_INT("hw.jme.rx_desc_count", &jme_rx_desc_count);
TUNABLE_INT("hw.jme.tx_desc_count", &jme_tx_desc_count);
TUNABLE_INT("hw.jme.rx_ring_count", &jme_rx_ring_count);
TUNABLE_INT("hw.jme.msi.enable", &jme_msi_enable);
TUNABLE_INT("hw.jme.msix.enable", &jme_msix_enable);
/*
* Read a PHY register on the MII of the JMC250.
*/
static int
jme_miibus_readreg(device_t dev, int phy, int reg)
{
struct jme_softc *sc = device_get_softc(dev);
uint32_t val;
int i;
/* For FPGA version, PHY address 0 should be ignored. */
if (sc->jme_caps & JME_CAP_FPGA) {
if (phy == 0)
return (0);
} else {
if (sc->jme_phyaddr != phy)
return (0);
}
CSR_WRITE_4(sc, JME_SMI, SMI_OP_READ | SMI_OP_EXECUTE |
SMI_PHY_ADDR(phy) | SMI_REG_ADDR(reg));
for (i = JME_PHY_TIMEOUT; i > 0; i--) {
DELAY(1);
if (((val = CSR_READ_4(sc, JME_SMI)) & SMI_OP_EXECUTE) == 0)
break;
}
if (i == 0) {
device_printf(sc->jme_dev, "phy read timeout: "
"phy %d, reg %d\n", phy, reg);
return (0);
}
return ((val & SMI_DATA_MASK) >> SMI_DATA_SHIFT);
}
/*
* Write a PHY register on the MII of the JMC250.
*/
static int
jme_miibus_writereg(device_t dev, int phy, int reg, int val)
{
struct jme_softc *sc = device_get_softc(dev);
int i;
/* For FPGA version, PHY address 0 should be ignored. */
if (sc->jme_caps & JME_CAP_FPGA) {
if (phy == 0)
return (0);
} else {
if (sc->jme_phyaddr != phy)
return (0);
}
CSR_WRITE_4(sc, JME_SMI, SMI_OP_WRITE | SMI_OP_EXECUTE |
((val << SMI_DATA_SHIFT) & SMI_DATA_MASK) |
SMI_PHY_ADDR(phy) | SMI_REG_ADDR(reg));
for (i = JME_PHY_TIMEOUT; i > 0; i--) {
DELAY(1);
if (((val = CSR_READ_4(sc, JME_SMI)) & SMI_OP_EXECUTE) == 0)
break;
}
if (i == 0) {
device_printf(sc->jme_dev, "phy write timeout: "
"phy %d, reg %d\n", phy, reg);
}
return (0);
}
/*
* Callback from MII layer when media changes.
*/
static void
jme_miibus_statchg(device_t dev)
{
struct jme_softc *sc = device_get_softc(dev);
struct ifnet *ifp = &sc->arpcom.ac_if;
struct mii_data *mii;
struct jme_txdesc *txd;
bus_addr_t paddr;
int i, r;
ASSERT_IFNET_SERIALIZED_ALL(ifp);
if ((ifp->if_flags & IFF_RUNNING) == 0)
return;
mii = device_get_softc(sc->jme_miibus);
sc->jme_flags &= ~JME_FLAG_LINK;
if ((mii->mii_media_status & IFM_AVALID) != 0) {
switch (IFM_SUBTYPE(mii->mii_media_active)) {
case IFM_10_T:
case IFM_100_TX:
sc->jme_flags |= JME_FLAG_LINK;
break;
case IFM_1000_T:
if (sc->jme_caps & JME_CAP_FASTETH)
break;
sc->jme_flags |= JME_FLAG_LINK;
break;
default:
break;
}
}
/*
* Disabling Rx/Tx MACs have a side-effect of resetting
* JME_TXNDA/JME_RXNDA register to the first address of
* Tx/Rx descriptor address. So driver should reset its
* internal procucer/consumer pointer and reclaim any
* allocated resources. Note, just saving the value of
* JME_TXNDA and JME_RXNDA registers before stopping MAC
* and restoring JME_TXNDA/JME_RXNDA register is not
* sufficient to make sure correct MAC state because
* stopping MAC operation can take a while and hardware
* might have updated JME_TXNDA/JME_RXNDA registers
* during the stop operation.
*/
/* Disable interrupts */
CSR_WRITE_4(sc, JME_INTR_MASK_CLR, JME_INTRS);
/* Stop driver */
ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
ifp->if_timer = 0;
callout_stop(&sc->jme_tick_ch);
/* Stop receiver/transmitter. */
jme_stop_rx(sc);
jme_stop_tx(sc);
for (r = 0; r < sc->jme_rx_ring_cnt; ++r) {
struct jme_rxdata *rdata = &sc->jme_cdata.jme_rx_data[r];
jme_rxeof(rdata, -1);
if (rdata->jme_rxhead != NULL)
m_freem(rdata->jme_rxhead);
JME_RXCHAIN_RESET(rdata);
/*
* Reuse configured Rx descriptors and reset
* procuder/consumer index.
*/
rdata->jme_rx_cons = 0;
}
jme_txeof(sc);
if (sc->jme_cdata.jme_tx_cnt != 0) {
/* Remove queued packets for transmit. */
for (i = 0; i < sc->jme_tx_desc_cnt; i++) {
txd = &sc->jme_cdata.jme_txdesc[i];
if (txd->tx_m != NULL) {
bus_dmamap_unload(
sc->jme_cdata.jme_tx_tag,
txd->tx_dmamap);
m_freem(txd->tx_m);
txd->tx_m = NULL;
txd->tx_ndesc = 0;
ifp->if_oerrors++;
}
}
}
jme_init_tx_ring(sc);
/* Initialize shadow status block. */
jme_init_ssb(sc);
/* Program MAC with resolved speed/duplex/flow-control. */
if (sc->jme_flags & JME_FLAG_LINK) {
jme_mac_config(sc);
CSR_WRITE_4(sc, JME_TXCSR, sc->jme_txcsr);
/* Set Tx ring address to the hardware. */
paddr = sc->jme_cdata.jme_tx_ring_paddr;
CSR_WRITE_4(sc, JME_TXDBA_HI, JME_ADDR_HI(paddr));
CSR_WRITE_4(sc, JME_TXDBA_LO, JME_ADDR_LO(paddr));
for (r = 0; r < sc->jme_rx_ring_cnt; ++r) {
CSR_WRITE_4(sc, JME_RXCSR,
sc->jme_rxcsr | RXCSR_RXQ_N_SEL(r));
/* Set Rx ring address to the hardware. */
paddr = sc->jme_cdata.jme_rx_data[r].jme_rx_ring_paddr;
CSR_WRITE_4(sc, JME_RXDBA_HI, JME_ADDR_HI(paddr));
CSR_WRITE_4(sc, JME_RXDBA_LO, JME_ADDR_LO(paddr));
}
/* Restart receiver/transmitter. */
CSR_WRITE_4(sc, JME_RXCSR, sc->jme_rxcsr | RXCSR_RX_ENB |
RXCSR_RXQ_START);
CSR_WRITE_4(sc, JME_TXCSR, sc->jme_txcsr | TXCSR_TX_ENB);
}
ifp->if_flags |= IFF_RUNNING;
ifp->if_flags &= ~IFF_OACTIVE;
callout_reset(&sc->jme_tick_ch, hz, jme_tick, sc);
#ifdef DEVICE_POLLING
if (!(ifp->if_flags & IFF_POLLING))
#endif
/* Reenable interrupts. */
CSR_WRITE_4(sc, JME_INTR_MASK_SET, JME_INTRS);
}
/*
* Get the current interface media status.
*/
static void
jme_mediastatus(struct ifnet *ifp, struct ifmediareq *ifmr)
{
struct jme_softc *sc = ifp->if_softc;
struct mii_data *mii = device_get_softc(sc->jme_miibus);
ASSERT_IFNET_SERIALIZED_ALL(ifp);
mii_pollstat(mii);
ifmr->ifm_status = mii->mii_media_status;
ifmr->ifm_active = mii->mii_media_active;
}
/*
* Set hardware to newly-selected media.
*/
static int
jme_mediachange(struct ifnet *ifp)
{
struct jme_softc *sc = ifp->if_softc;
struct mii_data *mii = device_get_softc(sc->jme_miibus);
int error;
ASSERT_IFNET_SERIALIZED_ALL(ifp);
if (mii->mii_instance != 0) {
struct mii_softc *miisc;
LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
mii_phy_reset(miisc);
}
error = mii_mediachg(mii);
return (error);
}
static int
jme_probe(device_t dev)
{
const struct jme_dev *sp;
uint16_t vid, did;
vid = pci_get_vendor(dev);
did = pci_get_device(dev);
for (sp = jme_devs; sp->jme_name != NULL; ++sp) {
if (vid == sp->jme_vendorid && did == sp->jme_deviceid) {
struct jme_softc *sc = device_get_softc(dev);
sc->jme_caps = sp->jme_caps;
device_set_desc(dev, sp->jme_name);
return (0);
}
}
return (ENXIO);
}
static int
jme_eeprom_read_byte(struct jme_softc *sc, uint8_t addr, uint8_t *val)
{
uint32_t reg;
int i;
*val = 0;
for (i = JME_TIMEOUT; i > 0; i--) {
reg = CSR_READ_4(sc, JME_SMBCSR);
if ((reg & SMBCSR_HW_BUSY_MASK) == SMBCSR_HW_IDLE)
break;
DELAY(1);
}
if (i == 0) {
device_printf(sc->jme_dev, "EEPROM idle timeout!\n");
return (ETIMEDOUT);
}
reg = ((uint32_t)addr << SMBINTF_ADDR_SHIFT) & SMBINTF_ADDR_MASK;
CSR_WRITE_4(sc, JME_SMBINTF, reg | SMBINTF_RD | SMBINTF_CMD_TRIGGER);
for (i = JME_TIMEOUT; i > 0; i--) {
DELAY(1);
reg = CSR_READ_4(sc, JME_SMBINTF);
if ((reg & SMBINTF_CMD_TRIGGER) == 0)
break;
}
if (i == 0) {
device_printf(sc->jme_dev, "EEPROM read timeout!\n");
return (ETIMEDOUT);
}
reg = CSR_READ_4(sc, JME_SMBINTF);
*val = (reg & SMBINTF_RD_DATA_MASK) >> SMBINTF_RD_DATA_SHIFT;
return (0);
}
static int
jme_eeprom_macaddr(struct jme_softc *sc, uint8_t eaddr[])
{
uint8_t fup, reg, val;
uint32_t offset;
int match;
offset = 0;
if (jme_eeprom_read_byte(sc, offset++, &fup) != 0 ||
fup != JME_EEPROM_SIG0)
return (ENOENT);
if (jme_eeprom_read_byte(sc, offset++, &fup) != 0 ||
fup != JME_EEPROM_SIG1)
return (ENOENT);
match = 0;
do {
if (jme_eeprom_read_byte(sc, offset, &fup) != 0)
break;
if (JME_EEPROM_MKDESC(JME_EEPROM_FUNC0, JME_EEPROM_PAGE_BAR1) ==
(fup & (JME_EEPROM_FUNC_MASK | JME_EEPROM_PAGE_MASK))) {
if (jme_eeprom_read_byte(sc, offset + 1, ®) != 0)
break;
if (reg >= JME_PAR0 &&
reg < JME_PAR0 + ETHER_ADDR_LEN) {
if (jme_eeprom_read_byte(sc, offset + 2,
&val) != 0)
break;
eaddr[reg - JME_PAR0] = val;
match++;
}
}
/* Check for the end of EEPROM descriptor. */
if ((fup & JME_EEPROM_DESC_END) == JME_EEPROM_DESC_END)
break;
/* Try next eeprom descriptor. */
offset += JME_EEPROM_DESC_BYTES;
} while (match != ETHER_ADDR_LEN && offset < JME_EEPROM_END);
if (match == ETHER_ADDR_LEN)
return (0);
return (ENOENT);
}
static void
jme_reg_macaddr(struct jme_softc *sc, uint8_t eaddr[])
{
uint32_t par0, par1;
/* Read station address. */
par0 = CSR_READ_4(sc, JME_PAR0);
par1 = CSR_READ_4(sc, JME_PAR1);
par1 &= 0xFFFF;
if ((par0 == 0 && par1 == 0) || (par0 & 0x1)) {
device_printf(sc->jme_dev,
"generating fake ethernet address.\n");
par0 = karc4random();
/* Set OUI to JMicron. */
eaddr[0] = 0x00;
eaddr[1] = 0x1B;
eaddr[2] = 0x8C;
eaddr[3] = (par0 >> 16) & 0xff;
eaddr[4] = (par0 >> 8) & 0xff;
eaddr[5] = par0 & 0xff;
} else {
eaddr[0] = (par0 >> 0) & 0xFF;
eaddr[1] = (par0 >> 8) & 0xFF;
eaddr[2] = (par0 >> 16) & 0xFF;
eaddr[3] = (par0 >> 24) & 0xFF;
eaddr[4] = (par1 >> 0) & 0xFF;
eaddr[5] = (par1 >> 8) & 0xFF;
}
}
static int
jme_attach(device_t dev)
{
struct jme_softc *sc = device_get_softc(dev);
struct ifnet *ifp = &sc->arpcom.ac_if;
uint32_t reg;
uint16_t did;
uint8_t pcie_ptr, rev;
int error = 0, i, j;
uint8_t eaddr[ETHER_ADDR_LEN];
lwkt_serialize_init(&sc->jme_serialize);
lwkt_serialize_init(&sc->jme_cdata.jme_tx_serialize);
for (i = 0; i < JME_NRXRING_MAX; ++i) {
lwkt_serialize_init(
&sc->jme_cdata.jme_rx_data[i].jme_rx_serialize);
}
sc->jme_rx_desc_cnt = device_getenv_int(dev, "rx_desc_count",
jme_rx_desc_count);
sc->jme_rx_desc_cnt = roundup(sc->jme_rx_desc_cnt, JME_NDESC_ALIGN);
if (sc->jme_rx_desc_cnt > JME_NDESC_MAX)
sc->jme_rx_desc_cnt = JME_NDESC_MAX;
sc->jme_tx_desc_cnt = device_getenv_int(dev, "tx_desc_count",
jme_tx_desc_count);
sc->jme_tx_desc_cnt = roundup(sc->jme_tx_desc_cnt, JME_NDESC_ALIGN);
if (sc->jme_tx_desc_cnt > JME_NDESC_MAX)
sc->jme_tx_desc_cnt = JME_NDESC_MAX;
/*
* Calculate rx rings
*/
sc->jme_rx_ring_cnt = device_getenv_int(dev, "rx_ring_count",
jme_rx_ring_count);
sc->jme_rx_ring_cnt = if_ring_count2(sc->jme_rx_ring_cnt,
JME_NRXRING_MAX);
i = 0;
sc->jme_serialize_arr[i++] = &sc->jme_serialize;
sc->jme_serialize_arr[i++] = &sc->jme_cdata.jme_tx_serialize;
for (j = 0; j < sc->jme_rx_ring_cnt; ++j) {
sc->jme_serialize_arr[i++] =
&sc->jme_cdata.jme_rx_data[j].jme_rx_serialize;
}
KKASSERT(i <= JME_NSERIALIZE);
sc->jme_serialize_cnt = i;
sc->jme_cdata.jme_sc = sc;
for (i = 0; i < sc->jme_rx_ring_cnt; ++i) {
struct jme_rxdata *rdata = &sc->jme_cdata.jme_rx_data[i];
rdata->jme_sc = sc;
rdata->jme_rx_coal = jme_rx_status[i].jme_coal;
rdata->jme_rx_comp = jme_rx_status[i].jme_comp;
rdata->jme_rx_empty = jme_rx_status[i].jme_empty;
rdata->jme_rx_idx = i;
}
sc->jme_dev = dev;
sc->jme_lowaddr = BUS_SPACE_MAXADDR;
if_initname(ifp, device_get_name(dev), device_get_unit(dev));
callout_init(&sc->jme_tick_ch);
#ifndef BURN_BRIDGES
if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) {
uint32_t irq, mem;
irq = pci_read_config(dev, PCIR_INTLINE, 4);
mem = pci_read_config(dev, JME_PCIR_BAR, 4);
device_printf(dev, "chip is in D%d power mode "
"-- setting to D0\n", pci_get_powerstate(dev));
pci_set_powerstate(dev, PCI_POWERSTATE_D0);
pci_write_config(dev, PCIR_INTLINE, irq, 4);
pci_write_config(dev, JME_PCIR_BAR, mem, 4);
}
#endif /* !BURN_BRIDGE */
/* Enable bus mastering */
pci_enable_busmaster(dev);
/*
* Allocate IO memory
*
* JMC250 supports both memory mapped and I/O register space
* access. Because I/O register access should use different
* BARs to access registers it's waste of time to use I/O
* register spce access. JMC250 uses 16K to map entire memory
* space.
*/
sc->jme_mem_rid = JME_PCIR_BAR;
sc->jme_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
&sc->jme_mem_rid, RF_ACTIVE);
if (sc->jme_mem_res == NULL) {
device_printf(dev, "can't allocate IO memory\n");
return ENXIO;
}
sc->jme_mem_bt = rman_get_bustag(sc->jme_mem_res);
sc->jme_mem_bh = rman_get_bushandle(sc->jme_mem_res);
/*
* Allocate IRQ
*/
error = jme_intr_alloc(dev);
if (error)
goto fail;
/*
* Extract revisions
*/
reg = CSR_READ_4(sc, JME_CHIPMODE);
if (((reg & CHIPMODE_FPGA_REV_MASK) >> CHIPMODE_FPGA_REV_SHIFT) !=
CHIPMODE_NOT_FPGA) {
sc->jme_caps |= JME_CAP_FPGA;
if (bootverbose) {
device_printf(dev, "FPGA revision: 0x%04x\n",
(reg & CHIPMODE_FPGA_REV_MASK) >>
CHIPMODE_FPGA_REV_SHIFT);
}
}
/* NOTE: FM revision is put in the upper 4 bits */
rev = ((reg & CHIPMODE_REVFM_MASK) >> CHIPMODE_REVFM_SHIFT) << 4;
rev |= (reg & CHIPMODE_REVECO_MASK) >> CHIPMODE_REVECO_SHIFT;
if (bootverbose)
device_printf(dev, "Revision (FM/ECO): 0x%02x\n", rev);
did = pci_get_device(dev);
switch (did) {
case PCI_PRODUCT_JMICRON_JMC250:
if (rev == JME_REV1_A2)
sc->jme_workaround |= JME_WA_EXTFIFO | JME_WA_HDX;
break;
case PCI_PRODUCT_JMICRON_JMC260:
if (rev == JME_REV2)
sc->jme_lowaddr = BUS_SPACE_MAXADDR_32BIT;
break;
default:
panic("unknown device id 0x%04x\n", did);
}
if (rev >= JME_REV2) {
sc->jme_clksrc = GHC_TXOFL_CLKSRC | GHC_TXMAC_CLKSRC;
sc->jme_clksrc_1000 = GHC_TXOFL_CLKSRC_1000 |
GHC_TXMAC_CLKSRC_1000;
}
/* Reset the ethernet controller. */
jme_reset(sc);
/* Map MSI/MSI-X vectors */
jme_set_msinum(sc);
/* Get station address. */
reg = CSR_READ_4(sc, JME_SMBCSR);
if (reg & SMBCSR_EEPROM_PRESENT)
error = jme_eeprom_macaddr(sc, eaddr);
if (error != 0 || (reg & SMBCSR_EEPROM_PRESENT) == 0) {
if (error != 0 && (bootverbose)) {
device_printf(dev, "ethernet hardware address "
"not found in EEPROM.\n");
}
jme_reg_macaddr(sc, eaddr);
}
/*
* Save PHY address.
* Integrated JR0211 has fixed PHY address whereas FPGA version
* requires PHY probing to get correct PHY address.
*/
if ((sc->jme_caps & JME_CAP_FPGA) == 0) {
sc->jme_phyaddr = CSR_READ_4(sc, JME_GPREG0) &
GPREG0_PHY_ADDR_MASK;
if (bootverbose) {
device_printf(dev, "PHY is at address %d.\n",
sc->jme_phyaddr);
}
} else {
sc->jme_phyaddr = 0;
}
/* Set max allowable DMA size. */
pcie_ptr = pci_get_pciecap_ptr(dev);
if (pcie_ptr != 0) {
uint16_t ctrl;
sc->jme_caps |= JME_CAP_PCIE;
ctrl = pci_read_config(dev, pcie_ptr + PCIER_DEVCTRL, 2);
if (bootverbose) {
device_printf(dev, "Read request size : %d bytes.\n",
128 << ((ctrl >> 12) & 0x07));
device_printf(dev, "TLP payload size : %d bytes.\n",
128 << ((ctrl >> 5) & 0x07));
}
switch (ctrl & PCIEM_DEVCTL_MAX_READRQ_MASK) {
case PCIEM_DEVCTL_MAX_READRQ_128:
sc->jme_tx_dma_size = TXCSR_DMA_SIZE_128;
break;
case PCIEM_DEVCTL_MAX_READRQ_256:
sc->jme_tx_dma_size = TXCSR_DMA_SIZE_256;
break;
default:
sc->jme_tx_dma_size = TXCSR_DMA_SIZE_512;
break;
}
sc->jme_rx_dma_size = RXCSR_DMA_SIZE_128;
} else {
sc->jme_tx_dma_size = TXCSR_DMA_SIZE_512;
sc->jme_rx_dma_size = RXCSR_DMA_SIZE_128;
}
#ifdef notyet
if (pci_find_extcap(dev, PCIY_PMG, &pmc) == 0)
sc->jme_caps |= JME_CAP_PMCAP;
#endif
/*
* Create sysctl tree
*/
jme_sysctl_node(sc);
/* Allocate DMA stuffs */
error = jme_dma_alloc(sc);
if (error)
goto fail;
ifp->if_softc = sc;
ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
ifp->if_init = jme_init;
ifp->if_ioctl = jme_ioctl;
ifp->if_start = jme_start;
#ifdef DEVICE_POLLING
ifp->if_poll = jme_poll;
#endif
ifp->if_watchdog = jme_watchdog;
ifp->if_serialize = jme_serialize;
ifp->if_deserialize = jme_deserialize;
ifp->if_tryserialize = jme_tryserialize;
#ifdef INVARIANTS
ifp->if_serialize_assert = jme_serialize_assert;
#endif
ifq_set_maxlen(&ifp->if_snd, sc->jme_tx_desc_cnt - JME_TXD_RSVD);
ifq_set_ready(&ifp->if_snd);
/* JMC250 supports Tx/Rx checksum offload and hardware vlan tagging. */
ifp->if_capabilities = IFCAP_HWCSUM |
IFCAP_VLAN_MTU |
IFCAP_VLAN_HWTAGGING;
if (sc->jme_rx_ring_cnt > JME_NRXRING_MIN)
ifp->if_capabilities |= IFCAP_RSS;
ifp->if_capenable = ifp->if_capabilities;
/*
* Disable TXCSUM by default to improve bulk data
* transmit performance (+20Mbps improvement).
*/
ifp->if_capenable &= ~IFCAP_TXCSUM;
if (ifp->if_capenable & IFCAP_TXCSUM)
ifp->if_hwassist = JME_CSUM_FEATURES;
/* Set up MII bus. */
error = mii_phy_probe(dev, &sc->jme_miibus,
jme_mediachange, jme_mediastatus);
if (error) {
device_printf(dev, "no PHY found!\n");
goto fail;
}
/*
* Save PHYADDR for FPGA mode PHY.
*/
if (sc->jme_caps & JME_CAP_FPGA) {
struct mii_data *mii = device_get_softc(sc->jme_miibus);
if (mii->mii_instance != 0) {
struct mii_softc *miisc;
LIST_FOREACH(miisc, &mii->mii_phys, mii_list) {
if (miisc->mii_phy != 0) {
sc->jme_phyaddr = miisc->mii_phy;
break;
}
}
if (sc->jme_phyaddr != 0) {
device_printf(sc->jme_dev,
"FPGA PHY is at %d\n", sc->jme_phyaddr);
/* vendor magic. */
jme_miibus_writereg(dev, sc->jme_phyaddr,
JMPHY_CONF, JMPHY_CONF_DEFFIFO);
/* XXX should we clear JME_WA_EXTFIFO */
}
}
}
ether_ifattach(ifp, eaddr, NULL);
/* Tell the upper layer(s) we support long frames. */
ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header);
error = jme_intr_setup(dev);
if (error) {
ether_ifdetach(ifp);
goto fail;
}
return 0;
fail:
jme_detach(dev);
return (error);
}
static int
jme_detach(device_t dev)
{
struct jme_softc *sc = device_get_softc(dev);
if (device_is_attached(dev)) {
struct ifnet *ifp = &sc->arpcom.ac_if;
ifnet_serialize_all(ifp);
jme_stop(sc);
jme_intr_teardown(dev);
ifnet_deserialize_all(ifp);
ether_ifdetach(ifp);
}
if (sc->jme_sysctl_tree != NULL)
sysctl_ctx_free(&sc->jme_sysctl_ctx);
if (sc->jme_miibus != NULL)
device_delete_child(dev, sc->jme_miibus);
bus_generic_detach(dev);
jme_intr_free(dev);
if (sc->jme_mem_res != NULL) {
bus_release_resource(dev, SYS_RES_MEMORY, sc->jme_mem_rid,
sc->jme_mem_res);
}
jme_dma_free(sc);
return (0);
}
static void
jme_sysctl_node(struct jme_softc *sc)
{
int coal_max;
#ifdef JME_RSS_DEBUG
char rx_ring_pkt[32];
int r;
#endif
sysctl_ctx_init(&sc->jme_sysctl_ctx);
sc->jme_sysctl_tree = SYSCTL_ADD_NODE(&sc->jme_sysctl_ctx,
SYSCTL_STATIC_CHILDREN(_hw), OID_AUTO,
device_get_nameunit(sc->jme_dev),
CTLFLAG_RD, 0, "");
if (sc->jme_sysctl_tree == NULL) {
device_printf(sc->jme_dev, "can't add sysctl node\n");
return;
}