Updated release compile config for performance

DroneBridge · Mar 8, 2024 · 3c64523 · 3c64523
1 parent 532b062
commit 3c64523
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Showing 6 changed files with 6,729 additions and 7 deletions.
diff --git a/create_release_zip.ps1 b/create_release_zip.ps1
@@ -8,7 +8,9 @@ mkdir $release_foldername
 cp .\flashing_instructions.txt $release_foldername
 
 rm -Recurse .\build
-idf.py set-target esp32 build
+idf.py set-target esp32
+cp .\sdkconfig_esp32 .\sdkconfig
+idf.py build
 mkdir $release_foldername\esp32
 cp .\build\flash_args $release_foldername\esp32\flash_args.txt
 cp .\build\db_esp32.bin $release_foldername\esp32
@@ -17,7 +19,9 @@ cp .\build\www.bin $release_foldername\esp32
 cp .\build\partition_table\partition-table.bin $release_foldername\esp32
 
 rm -Recurse .\build
-idf.py set-target esp32s2 build
+idf.py set-target esp32s2
+cp .\sdkconfig_s2 .\sdkconfig
+idf.py build
 mkdir $release_foldername\esp32s2
 cp .\build\flash_args $release_foldername\esp32s2\flash_args.txt
 cp .\build\db_esp32.bin $release_foldername\esp32s2
@@ -26,7 +30,9 @@ cp .\build\www.bin $release_foldername\esp32s2
 cp .\build\partition_table\partition-table.bin $release_foldername\esp32s2
 
 rm -Recurse .\build
-idf.py set-target esp32s3 build
+idf.py set-target esp32s3
+cp .\sdkconfig_s3 .\sdkconfig
+idf.py build
 mkdir $release_foldername\esp32s3
 cp .\build\flash_args $release_foldername\esp32s3\flash_args.txt
 cp .\build\db_esp32.bin $release_foldername\esp32s3
@@ -35,7 +41,9 @@ cp .\build\www.bin $release_foldername\esp32s3
 cp .\build\partition_table\partition-table.bin $release_foldername\esp32s3
 
 rm -Recurse .\build
-idf.py set-target esp32c3 build
+idf.py set-target esp32c3
+cp .\sdkconfig_c3 .\sdkconfig
+idf.py build
 mkdir $release_foldername\esp32c3
 cp .\build\flash_args $release_foldername\esp32c3\flash_args.txt
 cp .\build\db_esp32.bin $release_foldername\esp32c3

diff --git a/main/main.c b/main/main.c
@@ -57,11 +57,11 @@ uint8_t DB_UART_PIN_TX = GPIO_NUM_0;
 uint8_t DB_UART_PIN_RX = GPIO_NUM_0;
 uint8_t DB_UART_PIN_RTS = GPIO_NUM_0;
 uint8_t DB_UART_PIN_CTS = GPIO_NUM_0;
-uint8_t DB_UART_RTS_THRESH = 100;
+uint8_t DB_UART_RTS_THRESH = 64;
 
-int32_t DB_UART_BAUD_RATE = 115200;
+int32_t DB_UART_BAUD_RATE = 57600;
 uint16_t TRANSPARENT_BUF_SIZE = 64;
-uint8_t LTM_FRAME_NUM_BUFFER = 1;
+uint8_t LTM_FRAME_NUM_BUFFER = 2;
 uint8_t MSP_LTM_SAMEPORT = 0;
 int station_rssi = 0;