Misaligned memory operations are not handled correctly

[lupino3]

The code

LD R1, 2(R0)

should raise an error, as the effective address (0 + 2 = 2) is not 8-byte aligned;

The code

SW R0, 2(R0)

crashes the simulator, with the following error:

edumips64.core.is.AddressErrorException
at edumips64.core.is.SW.MEM(SW.java:64) at edumips64.core.CPU.step(CPU.java:240) at edumips64.ui.CPUGUIThread.run(CPUGUIThread.java:137)

It's obvious that misaligned access must be handled consistently and gracefully.

References: H&P Appendix B.3; MIPS64 Vol. 2 (The MIPS64 Instruction Set) - description of Load/Store instructions