Merge pull request #2042 from lioncash/vnot

IR: Handle 256-bit VNot
FEX-Emu · Sep 29, 2022 · 64c4fdc · 64c4fdc
2 parents d715ffb + 364bb3a
commit 64c4fdc
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Showing 3 changed files with 27 additions and 9 deletions.
diff --git a/External/FEXCore/Source/Interface/Core/Interpreter/VectorOps.cpp b/External/FEXCore/Source/Interface/Core/Interpreter/VectorOps.cpp
@@ -726,11 +726,15 @@ DEF_OP(VFNeg) {
 }
 
 DEF_OP(VNot) {
-  auto Op = IROp->C<IR::IROp_VNot>();
-  const auto Src1 = *GetSrc<__uint128_t*>(Data->SSAData, Op->Vector);
+  const auto Op = IROp->C<IR::IROp_VNot>();
+  const auto Src = *GetSrc<InterpVector256*>(Data->SSAData, Op->Vector);
 
-  const auto Dst = ~Src1;
-  memcpy(GDP, &Dst, 16);
+  const auto Dst = InterpVector256{
+    .Lower = ~Src.Lower,
+    .Upper = ~Src.Upper,
+  };
+
+  memcpy(GDP, &Dst, sizeof(Dst));
 }
 
 DEF_OP(VUMin) {

diff --git a/External/FEXCore/Source/Interface/Core/JIT/Arm64/VectorOps.cpp b/External/FEXCore/Source/Interface/Core/JIT/Arm64/VectorOps.cpp
@@ -1800,8 +1800,18 @@ DEF_OP(VFNeg) {
 }
 
 DEF_OP(VNot) {
-  auto Op = IROp->C<IR::IROp_VNot>();
-  mvn(GetDst(Node).V16B(), GetSrc(Op->Vector.ID()).V16B());
+  const auto Op = IROp->C<IR::IROp_VNot>();
+  const auto OpSize = IROp->Size;
+  const auto Is256Bit = OpSize == Core::CPUState::XMM_AVX_REG_SIZE;
+
+  const auto Dst = GetDst(Node);
+  const auto Vector = GetSrc(Op->Vector.ID());
+
+  if (HostSupportsSVE && Is256Bit) {
+    not_(Dst.Z().VnB(), PRED_TMP_32B.Merging(), Vector.Z().VnB());
+  } else {
+    mvn(Dst.V16B(), Vector.V16B());
+  }
 }
 
 DEF_OP(VUMin) {

diff --git a/External/FEXCore/Source/Interface/Core/JIT/x86_64/VectorOps.cpp b/External/FEXCore/Source/Interface/Core/JIT/x86_64/VectorOps.cpp
@@ -1084,9 +1084,13 @@ DEF_OP(VFNeg) {
 }
 
 DEF_OP(VNot) {
-  auto Op = IROp->C<IR::IROp_VNot>();
-  pcmpeqd(xmm15, xmm15);
-  vpxor(GetDst(Node), xmm15, GetSrc(Op->Vector.ID()));
+  const auto Op = IROp->C<IR::IROp_VNot>();
+
+  const auto Dst = ToYMM(GetDst(Node));
+  const auto Vector = ToYMM(GetSrc(Op->Vector.ID()));
+
+  vpcmpeqd(ymm15, ymm15, ymm15);
+  vpxor(Dst, ymm15, Vector);
 }
 
 DEF_OP(VUMin) {