nRF52 support

[henrygab]

FastLED support requires three parts:

1. FastPIN
2. FastSPI
3. Clockless

This pull requests provides the first two of these: FastPIN and FastSPI.

@focalintent, I will definitely need help with clockless...

[henrygab]

Useful items that can be relied upon from nrfx, which is used by the BSPs for the nRF52 series:

• nrf_delay_us(uint32_t number_of_us)
• nrf_delay_ms(uint32_t number_of_ms)
• NRFX_RTC_US_TO_TICKS(us,freq)

Nordic provides a guide (html) to migrating from the nRF51 (which uses arm\common\m0clockless.h) to the nRF52. Here's some takeaways:

Performance

• The processor for nRF52 is an ARM Cortex M4F.
• nRF52 processor runs at 64MHz (vs 16MHz of nRF51).
• The APB system (interconnect to peripherals / flash) still runs at 16MHz.
  • Code should interleave APB writes (peripherals) with non-memory operations for highest throughput
    • Reading from peripherals on APB system may take relatively longer (clock cycles)
    • Cortex-M4 processor uses a write buffer for the APB system.
    • The write buffer allows the core, after writing to the APB, to continue to execute code that does not access the system bus.
    • Any read from the APB system implies a wait for the write buffer to complete.
  • Sequential code usually can run without stalling the pipeline
    • Executing code from flash may have a wait-state penalty due to the 16MHz APB
    • The exact wait-state penalty also depends on whether instruction cache is enabled or not (it's enabled on Adafruit bootloader)
    • Cortex-M4F does prefetching, so sequential code usually can run without stalling the pipeline
• The nRF52 has five timers (vs. 3 with nRF51)
  • All five timers support all bit modes (8,16, 24, 32)
  • Therefore, no longer a requirement to use NRF_TIMER1 to get 32-bit timer as on nRF51
  • The timers use a the 16MHz clock
• SysTick timer was added
• Two RTC peripherals (vs. one in nRF51)
  • the RTC appear to use a 32MHz clock.

[focalintent]

Thank you for this! I'm completely underwater with a number of projects so it will be a few weeks (at the earliest) before I'll be able to dive into integrating this and filling in the clockless bits. (Just wanted to let you know that I had seen it and wasn't ignoring it)

[henrygab]

@focalintent - REALLY appreciate the note, thanks! I will attempt to stay silent for next few weeks. Good luck!

P.S. - If I can provide any information that would make it easier for you to implement clockless, let me know.

[henrygab]

Additional information for anyone wanting to add Cortex M4 clockless support:

• Cortex M4 Technical Reference Manual (TRM) (pdf)
• Cortex M4 Technical Reference Manual (TRM) (html)
• ARM v7-M Architecture Reference Manual (pdf)

Specifically, the following sections may be of interest:

1. TRM Section 3.3.3, which highlights LOAD/STORE timing
2. TRM Section 3.3.1, table 3-1, which lists cycle timing for instructions
3. the architecture reference manual, A.7.7, Thumb Instructions (esp. IT instruction, for making up to four next instructions conditional....)

[henrygab]

Good news. I've implemented a version of clockless. I've some minor cleanup, and then I can push it into the nrfx branch.

I've tested every clockless chipset definition's output with an oscilloscope.
(note: I have a new PR that will address some issues found with chipset.h there....)

Caveats:

• Currently hard-coded to 144 LEDs maximum per string.
• Currently hard-coded to use of only PWM0.

Future work includes:

1. Enabling user-configured maximum LED string length, to reduce RAM usage.
2. Enabling substantially infinite LED string length (method designed, not written or tested yet)

[henrygab]

Closing this one as points to a now-defunct branch.
See new PR #802