Incomplete semantics for some ARM instructions causes translation failure

[danmatichuk]

For the following instruction encodings:

• aarch32_USAT16_A_aarch32_USAT16_A1_A_A32
• aarch32_USAT16_A_aarch32_USAT16_T1_A_T32
• aarch32_USAT_A_aarch32_USAT_A1_A_A32
• aarch32_USAT_A_aarch32_USAT_T1_A_T32

The ASL specification does not have a clear semantics when sat_imm is zero. As written, the ASL code would require creating a zero-width bitvector given a sat_imm of zero, which is then zero-extended to 16 bits.

Either this is an error/unpredictable or the resulting bitvector should be entirely zeroes. Either way this should be clarified.

Currently this causes an exception during translation (which is expected/ignored) as crucible disallows creating zero-width bitvectors.