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Verilog code for the static segmented mutiply-and-add (MAA) unit used in the floating point multiplier. Reference paper: Approximate floating-point multiplier based on static segmentation, Electronics MDPI. Main file: FPmult_opt_pipe_SSM.v Multiply-and-add unit: MMssm_n23_m* (SSFPM in the paper) and MMssm_corr2_n23_m* (cSSFPM in the paper). Change the MAA name in the FPmult_opt_pipe_SSM.v for simulations.
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