Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom

Duplicated power output constraints for VRE when Reserves are turned on #574

Closed
cfe316 opened this issue Nov 11, 2023 · 2 comments
Closed

Duplicated power output constraints for VRE when Reserves are turned on #574

cfe316 opened this issue Nov 11, 2023 · 2 comments
Labels
bug Something isn't working

Comments

@cfe316
Copy link
Collaborator

cfe316 commented Nov 11, 2023

Below, the for loop should be inside the if statement, not outside.

for y in VRE_POWER_OUT
	VRE_BINS = intersect(dfGen[dfGen[!,:R_ID].>=y,:R_ID], dfGen[dfGen[!,:R_ID].<=y+dfGen[y,:Num_VRE_Bins]-1,:R_ID])
	if Reserves == 1
			curtailable_variable_renewable_reserves!(EP, inputs)
	else
	    ...
	end
end

Although this should not affect the results, these duplicated (by the number of VRE in the model) constraints would slow model creation and use extra memory.
@cfe316 cfe316 added the bug Something isn't working label Nov 11, 2023
cfe316 added a commit to cfe316/GenX that referenced this issue Nov 11, 2023
@cfe316
Refactor VRE reserves and fix bug
036933a 
This fixes GenXProject#573, where Reserves + Num_VRE_Bins > 1 would lead to the
VRE_NO_POWER_OUT resources being able to contribute an infinite amount
to the reserves.

This fixes GenXProject#574, where VRE power output constraints were being applied
length(VRE) times to all VRE resources, when Reserves = 1.
cfe316 added a commit to cfe316/GenX that referenced this issue Nov 13, 2023
@cfe316
Refactor VRE reserves and fix bug
55a9b88 
This fixes GenXProject#573, where Reserves + Num_VRE_Bins > 1 would lead to the
VRE_NO_POWER_OUT resources being able to contribute an infinite amount
to the reserves.

This fixes GenXProject#574, where VRE power output constraints were being applied
length(VRE) times to all VRE resources, when Reserves = 1.
@cfe316
Copy link
Collaborator Author

cfe316 commented Nov 13, 2023

This would be fixed by #562 .

cfe316 added a commit to cfe316/GenX that referenced this issue Nov 13, 2023
@cfe316
Refactor VRE reserves and fix bug
72cc97a 
This fixes GenXProject#573, where Reserves + Num_VRE_Bins > 1 would lead to the
VRE_NO_POWER_OUT resources being able to contribute an infinite amount
to the reserves.

This fixes GenXProject#574, where VRE power output constraints were being applied
length(VRE) times to all VRE resources, when Reserves = 1.
cfe316 added a commit to cfe316/GenX that referenced this issue Nov 14, 2023
@cfe316
Refactor VRE reserves and fix bug
13be2dd 
This fixes GenXProject#573, where Reserves + Num_VRE_Bins > 1 would lead to the
VRE_NO_POWER_OUT resources being able to contribute an infinite amount
to the reserves.

This fixes GenXProject#574, where VRE power output constraints were being applied
length(VRE) times to all VRE resources, when Reserves = 1.
cfe316 added a commit that referenced this issue Nov 18, 2023
@cfe316 @lbonaldo
Refactor reserves (#562)
2ef54dc 
This fixes #573, where Reserves + Num_VRE_Bins > 1 would lead to the
VRE_NO_POWER_OUT resources being able to contribute an infinite amount
to the reserves.

This fixes #574, where VRE power output constraints were being applied
length(VRE) times to all VRE resources, when Reserves = 1.

This fixed #566, where some constraints in storage_symmetric were redundant.
---------

Co-authored-by: Luca Bonaldo <39280783+lbonaldo@users.noreply.github.com>
@cfe316
Copy link
Collaborator Author

cfe316 commented Nov 18, 2023

The fix for this has been merged to develop.

@cfe316 cfe316 closed this as completed Nov 18, 2023
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Assignees
No one assigned
Labels
bug Something isn't working
Projects
None yet
Milestone
No milestone
Development

No branches or pull requests
1 participant
@cfe316