Add edge-rate control resistors on FPGA side.

GlasgowEmbedded · Jun 24, 2018 · 7c3203c · 7c3203c
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commit 7c3203c
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diff --git a/hardware/boards/glasgow/glasgow-cache.lib b/hardware/boards/glasgow/glasgow-cache.lib
@@ -219,24 +219,6 @@ X 4 4 0 -200 50 U 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
-# Device:Fuse
-#
-DEF Device:Fuse F 0 0 N Y 1 F N
-F0 "F" 80 0 50 V V C CNN
-F1 "Device:Fuse" -75 0 50 V V C CNN
-F2 "" -70 0 50 V I C CNN
-F3 "" 0 0 50 H I C CNN
-$FPLIST
- *Fuse*
-$ENDFPLIST
-DRAW
-S -30 -100 30 100 0 1 10 N
-P 2 0 1 0 0 100 0 -100 N
-X ~ 1 0 150 50 D 50 50 1 1 P
-X ~ 2 0 -150 50 U 50 50 1 1 P
-ENDDRAW
-ENDDEF
-#
 # Device:LED
 #
 DEF Device:LED D 0 40 N N 1 F N
@@ -604,6 +586,28 @@ X VCC 8 0 300 100 D 50 50 1 1 W
 ENDDRAW
 ENDDEF
 #
+# Power_Protection:TPD3S014
+#
+DEF Power_Protection:TPD3S014 U 0 20 Y Y 1 F N
+F0 "U" -250 250 50 H V C CNN
+F1 "Power_Protection:TPD3S014" 100 250 50 H V C CNN
+F2 "Package_TO_SOT_SMD:SOT-23-6" 0 350 50 H I C CNN
+F3 "" -200 250 50 H I C CNN
+ALIAS TPD3S044
+$FPLIST
+ SOT?23*
+$ENDFPLIST
+DRAW
+S -300 200 300 -200 0 1 10 f
+X EN 1 -400 -100 100 R 50 50 1 1 I
+X GND 2 0 -300 100 U 50 50 1 1 W
+X IN 3 -400 100 100 R 50 50 1 1 W
+X OUT 4 400 100 100 L 50 50 1 1 P
+X D1 5 400 0 100 L 50 50 1 1 P
+X D2 6 400 -100 100 L 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
 # Power_Supervisor:LM3880
 #
 DEF Power_Supervisor:LM3880 U 0 20 Y Y 1 F N