SHA256Hasher description
| Short name | Full name | Address range |
|---|---|---|
| HCR0 | Hasher Control Register 0 | 0h |
| HSR[0:7] | Hasher State Register | 1h-8h |
| Reserved[0:6] | Reserved | 9h-Fh |
| Short name | Full name | MSB position | LSB position | Access | Default value | Description |
|---|---|---|---|---|---|---|
| LBA[6:0] | Last Block Address | 31 | 25 | R/W | 0 | The address of the last block of the input message. 0 for 512 bit message, 1 for 1024 bit message etc. |
| SC | Start Calculations | 24 | 24 | R/W | 0 | To start the SHA256 calculations, SC should be set. After the calculations are done, SC will automatically be cleared. This feature can be used to detect the end of the calculations. |
| CCIE | Calculations Complete Interrupt Enable | 23 | 23 | R/W | 0 | CCIE should be set to enable an interrupt generation when calculations are done. |
| CCIF | Calculations Complete Interrupt Flag | 22 | 22 | R/W | 0 | CCIF shows that interrupt has happened. This flag should be manually cleared in your interrupt handler. |
| Reserved | Reserved | 21 | 0 | R | 0xBEEF | Reserved area. The default value can be used for memory reading tests. |
This group of registers are intended for a setting initial hasher's state and getting the result of the calculations.