Verilator Simple Usage

Use Decoder.v as an example. Use File I/O to get input data.

Generate executable file

$ verilator --cc Decoder.v --exe Decoder_Sim.cpp --trace
$ make -j -C ./obj_dir -f VDecoder.mk VDecoder

$ ./obj_dir/VDecoder

Use gtkwave to view the wave.

Name		Name	Last commit message	Last commit date
Latest commit History 11 Commits
pipe		pipe
riscv-mini-five-stage		riscv-mini-five-stage
.gitignore		.gitignore
Adder.v		Adder.v
Adder_Sim.cpp		Adder_Sim.cpp
Decoder.v		Decoder.v
Decoder_Sim.cpp		Decoder_Sim.cpp
FIR.v		FIR.v
FIR_Sim.cpp		FIR_Sim.cpp
MuxLookup_Test.v		MuxLookup_Test.v
PC.v		PC.v
README.md		README.md
Sim_MuxLookup_Test.cpp		Sim_MuxLookup_Test.cpp
Sim_PC.cpp		Sim_PC.cpp
Test.v		Test.v
Test_Sim.cpp		Test_Sim.cpp
Timer.v		Timer.v
fir_input.txt		fir_input.txt
input.txt		input.txt
timer_sim.cpp		timer_sim.cpp