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Verilog library of EPC Gen-2 RFID Tag Baseband Processor for IC and FPGA designers

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EPC Gen-2 RFID Tag Baseband Processor

EPC Radio-Frequency Identity Protocols Generation-2 UHF RFID :
http://www.gs1.org/sites/default/files/docs/epc/Gen2_Protocol_Standard.pdf

GitHub repository :
https://github.com/Gurint/EPC-Gen2-RFID-Tag-Baseband-Processor

Introduction

A low-cost low-power baseband processor for EPC Gen-2 UHF RFID Tag

  • operated in the lowest frequency (see FM0 and Miller Encoder/Decoder)
  • clock gating
  • operand isolation
  • need a memory (in my case, I use a ROM)
  • Verilog language
  • synthesized by Synopsys Design Compiler
  • apr by Synopsys IC Compiler
  • implemented by TSMC 0.18 um CMOS standard process

Modules

NAME DESCRIPTION
bb_proc baseband processor, top module
cmd_buf command buffer, serial to parallel
cmd_proc command processor, processes received commands
crc16 CRC-16 encoder/decoder
crc5 CRC-5 encoder/decoder
crg clock/reset generator, timing control
fm0_enc FM0 Encoder, operates in the lowest freq.
frmgen frame generator, generates preamble, backscattered data, end-of-signaling
fs_detector frame-sync detector
mem_if memory interface
miller_enc Miller encoder, operates in the lowest freq.
prng 16-bit Pseudorandom number generator
rx Receive
two_dff_sync Synchronizer, synchronizes signals from clock domain A to B
tx Transmit

Test Bench

bb_proc_tb : an example of the communication between a Reader and a single Tag

Scripts

bb_proc_syn : for synthesis
bb_proc_apr : for apr

ROM Code File

rom_code : 64x16, 64 words and 16 bits per word

Notes

This design is implemented by TSMC 0.18 um CMOS standard process. It's not able to manufacture EEPROM, so I use a ROM to be processor's memory. That makes I can't verify Write command. I am not able to provide ROM's verilog file because of confidentiality. It's generated by memory compiler of Artisan Components, Inc. Anyone wanting to use this baseband processor should make your own memory. For simply test, you can write a register file. For tapeout, I suggest you generating a EEPROM.

Author

Ian Chuang
ianchuang0212@gmail.com
https://github.com/Gurint

License

The EPC-Gen2-RFID-Tag-Baseband-Processor repository source code is licensed under the MIT license.
See LICENSE for MIT copyright terms.

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Verilog library of EPC Gen-2 RFID Tag Baseband Processor for IC and FPGA designers

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