/
m0_stepLib.sml
2066 lines (1830 loc) · 67.8 KB
/
m0_stepLib.sml
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(* ------------------------------------------------------------------------
ARMv6-M step evaluator
------------------------------------------------------------------------ *)
structure m0_stepLib :> m0_stepLib =
struct
open HolKernel boolLib bossLib
open m0Theory m0_stepTheory
open state_transformerSyntax blastLib
open Parse
val ambient_grammars = (type_grammar(), term_grammar())
val _ = temp_set_grammars m0_stepTheory.m0_step_grammars
val ERR = Feedback.mk_HOL_ERR "m0_stepLib"
val WARN = Feedback.HOL_WARNING "m0_stepLib"
val () = show_assums := true
(* ========================================================================= *)
val mk_byte = bitstringSyntax.mk_vec 8
val rhsc = utilsLib.rhsc
fun mapl x = utilsLib.augment x [[]]
fun MATCH_HYP_RW l = utilsLib.MATCH_HYP_CONV_RULE (REWRITE_CONV l)
val REG_CONV = REWRITE_CONV [v2w_13_15_rwts, v2w_ground4]
val opcodes = utilsLib.list_mk_wordii 4 (List.tabulate (16, Lib.I))
val arithlogic = utilsLib.list_mk_wordii 4 [0,1,2,3,4,5,6,7,12,14]
val testcompare = utilsLib.list_mk_wordii 2 [0,2,3]
val st = Term.mk_var ("s", Type.mk_type ("m0_state", []))
fun mk_arm_const n = Term.prim_mk_const {Thy = "m0", Name = n}
fun mk_arm_type n = Type.mk_thy_type {Thy = "m0", Tyop = n, Args = []}
(* ---------------------------- *)
local
val a_of = utilsLib.accessor_fns o mk_arm_type
val u_of = utilsLib.update_fns o mk_arm_type
val state_fns = a_of "m0_state"
val other_fns =
[pairSyntax.fst_tm, pairSyntax.snd_tm, bitstringSyntax.v2w_tm,
``IncPC ()``, ``(h >< l) : 'a word -> 'b word``] @ u_of "m0_state"
val exc = ``SND (raise'exception e s : 'a # m0_state)``
in
val cond_rand_thms = utilsLib.mk_cond_rand_thms (other_fns @ state_fns)
val snd_exception_thms =
utilsLib.map_conv
(Drule.GEN_ALL o
utilsLib.SRW_CONV [cond_rand_thms, m0Theory.raise'exception_def] o
(fn tm => Term.mk_comb (tm, exc))) state_fns
end
(* ---------------------------- *)
(* ARM datatype theorems/conversions *)
fun datatype_thms thms =
thms @ [cond_rand_thms, snd_exception_thms, FST_SWAP,
m0_stepTheory.Align, m0_stepTheory.Aligned] @
utilsLib.datatype_rewrites true "m0" ["m0_state", "RName", "SRType", "PSR"]
val DATATYPE_CONV = REWRITE_CONV (datatype_thms [])
val DATATYPE_RULE = Conv.CONV_RULE DATATYPE_CONV
val FULL_DATATYPE_RULE = utilsLib.FULL_CONV_RULE DATATYPE_CONV
val COND_UPDATE_CONV =
REWRITE_CONV
(utilsLib.qm [] ``!b. (if b then T else F) = b`` ::
utilsLib.mk_cond_update_thms (List.map mk_arm_type ["m0_state", "PSR"]))
val COND_UPDATE_RULE = Conv.CONV_RULE COND_UPDATE_CONV
val STATE_CONV =
REWRITE_CONV (utilsLib.datatype_rewrites true "m0" ["m0_state"] @
[boolTheory.COND_ID, cond_rand_thms])
local
val cmp = computeLib.bool_compset ()
val () = computeLib.add_thms (datatype_thms [pairTheory.FST]) cmp
in
val EVAL_DATATYPE_CONV = Conv.TRY_CONV (utilsLib.CHANGE_CBV_CONV cmp)
end
fun fix_datatype tm = rhsc (Conv.QCONV DATATYPE_CONV tm)
val fix_datatypes = List.map fix_datatype
local
val big_tm = fix_datatype ``^st.AIRCR.ENDIANNESS``
val little_tm = boolSyntax.mk_neg big_tm
val spsel_tm = fix_datatype ``^st.CONTROL.SPSEL``
val nspsel_tm = boolSyntax.mk_neg spsel_tm
in
fun endian be = [if be then big_tm else little_tm]
fun spsel sel = [if sel then spsel_tm else nspsel_tm]
end
fun specialized0 m tms =
utilsLib.specialized m (Conv.ALL_CONV, fix_datatypes tms)
fun specialized1 m tms =
utilsLib.specialized m (utilsLib.WGROUND_CONV, fix_datatypes tms)
fun state_with_pcinc e = (st |-> fix_datatype ``^st with pcinc := ^e``)
local
fun ADD_PRECOND_RULE e thm =
FULL_DATATYPE_RULE (Thm.INST [state_with_pcinc e] thm)
val rwts = ref ([]: thm list)
in
fun getThms e tms =
List.map (ADD_PRECOND_RULE e) (specialized1 "eval" tms (!rwts))
|> List.filter (not o utilsLib.vacuous)
fun resetThms () = rwts := []
fun addThms thms = (rwts := thms @ !rwts; thms)
end
val EV = utilsLib.STEP (datatype_thms, st)
val resetEvConv = utilsLib.resetStepConv
val setEvConv = utilsLib.setStepConv
(* ========================================================================= *)
(* register access *)
val () = setEvConv utilsLib.WGROUND_CONV
val PC_rwt =
EV [PC_def, R_def] [] []
``PC`` |> hd
val () = resetEvConv ()
val write'PC_rwt =
EV [write'PC_def] [] []
``write'PC x`` |> hd
local
val mask_sp =
blastLib.BBLAST_PROVE
``d && 0xFFFFFFFCw : word32 = ((31 >< 2) d : word30) @@ (0w: word2)``
fun r_rwt t = Q.prove(t,
wordsLib.Cases_on_word_value `n`
\\ simp [write'R_def, R_def, R_name_def, LookUpSP_def, num2RName_thm,
mask_sp]
)
|> Drule.UNDISCH
in
val R_name_rwt = r_rwt
`n <> 15w ==> (R n ^st = ^st.REG (R_name ^st.CONTROL.SPSEL n))`
val write'R_name_rwt = r_rwt
`n <> 15w ==>
(write'R (d, n) ^st =
^st with REG :=
(R_name ^st.CONTROL.SPSEL n =+
if n = 13w then d && 0xFFFFFFFCw else d) ^st.REG)`
val RName_LR_rwt = EVAL ``m0_step$R_name x 14w``
end
(* ---------------------------- *)
(* write PC *)
val BranchTo_rwt =
EV [BranchTo_def, write'PC_rwt] [] []
``BranchTo imm32`` |> hd
val IncPC_rwt =
EV [IncPC_def, BranchTo_rwt] [] []
``IncPC ()`` |> hd
val BranchWritePC_rwt =
EV [BranchWritePC_def, BranchTo_rwt] [] []
``BranchWritePC imm32`` |> hd
val BXWritePC_rwt =
EV [BXWritePC_def, BranchTo_rwt]
[[``^st.CurrentMode <> Mode_Handler``, ``word_bit 0 (imm32:word32)``]] []
``BXWritePC imm32`` |> hd
val BLXWritePC_rwt =
EV [BLXWritePC_def, BranchTo_rwt] [[``word_bit 0 (imm32:word32)``]] []
``BLXWritePC imm32`` |> hd
val LoadWritePC_rwt =
EV [LoadWritePC_def, BXWritePC_rwt] [] []
``LoadWritePC imm32`` |> hd
val ALUWritePC_rwt =
EV [ALUWritePC_def, BranchWritePC_rwt] [] []
``ALUWritePC d`` |> hd
(* ---------------------------- *)
(* read mem *)
fun fixwidth_for ty =
bitstringTheory.fixwidth_id
|> Q.ISPEC `w2v (w:^(ty_antiq (wordsSyntax.mk_word_type ty)))`
|> REWRITE_RULE [bitstringTheory.length_w2v]
|> Conv.CONV_RULE (Conv.DEPTH_CONV wordsLib.SIZES_CONV)
|> Drule.GEN_ALL
val mem_rwt =
EV ([mem_def, mem1_def, concat16, concat32, bitstringTheory.field_fixwidth] @
List.map fixwidth_for [``:8``, ``:16``, ``:32``]) []
(mapl (`n`, [``1n``,``2n``,``4n``]))
``mem (a, n)``
val BigEndianReverse_rwt =
EV [BigEndianReverse_def] [] (mapl (`n`, [``1n``,``2n``,``4n``]))
``BigEndianReverse (v, n)``
local
val rwts =
[MemA_def, cond_rand_thms, snd_exception_thms, alignmentTheory.aligned_0,
wordsTheory.WORD_ADD_0, bitstringTheory.v2w_w2v] @
mem_rwt @ BigEndianReverse_rwt
in
val MemA_1_rwt =
EV (rwts @ [bitstringTheory.field_fixwidth, fixwidth_for ``:8``]) [] []
``MemA (v, 1) : m0_state -> word8 # m0_state``
|> hd
val MemA_2_rwt =
EV (extract16 :: rwts) [[``aligned 1 (v:word32)``]] []
``MemA (v, 2) : m0_state -> word16 # m0_state``
|> hd
val MemA_4_rwt =
EV (extract32 :: rwts) [[``aligned 2 (v:word32)``]] []
``MemA (v, 4) : m0_state -> word32 # m0_state``
|> hd
val MemU_1_rwt =
EV [MemU_def, MemA_1_rwt] [] []
``MemU (v, 1) : m0_state -> word8 # m0_state``
|> hd
val MemU_2_rwt =
EV [MemU_def, MemA_2_rwt] [] []
``MemU (v, 2) : m0_state -> word16 # m0_state``
|> hd
val MemU_4_rwt =
EV [MemU_def, MemA_4_rwt] [] []
``MemU (v, 4) : m0_state -> word32 # m0_state``
|> hd
end
(* ---------------------------- *)
(* write mem *)
val write'mem_rwt =
EV ([write'mem_def]) [] (mapl (`n`, [``1n``,``2n``,``4n``]))
``write'mem (v, a, n)``
local
val field_cond_rand = Drule.ISPEC ``field h l`` boolTheory.COND_RAND
val rwts =
[write'MemA_def, cond_rand_thms, snd_exception_thms,
wordsTheory.WORD_ADD_0, bitstringTheory.v2w_w2v,
alignmentTheory.aligned_0, field_cond_rand] @
write'mem_rwt @ BigEndianReverse_rwt
in
val write'MemA_1_rwt =
EV (rwts @ [fixwidth_for ``:8``, bitstringTheory.field_fixwidth]) [] []
``write'MemA (w: word8, v, 1)``
|> hd
val write'MemA_2_rwt =
EV (field16 :: rwts) [[``aligned 1 (v:word32)``]] []
``write'MemA (w:word16, v, 2)``
|> hd
val write'MemA_4_rwt =
EV (field32 :: rwts) [[``aligned 2 (v:word32)``]] []
``write'MemA (w:word32, v, 4)``
|> hd
val write'MemU_1_rwt =
EV [write'MemU_def, write'MemA_1_rwt] [] []
``write'MemU (w: word8, v, 1)``
|> hd
val write'MemU_2_rwt =
EV [write'MemU_def, write'MemA_2_rwt] [] []
``write'MemU (w: word16, v, 2)``
|> hd
val write'MemU_4_rwt =
EV [write'MemU_def, write'MemA_4_rwt] [] []
``write'MemU (w: word32, v, 4)``
|> hd
end
;
(* ---------------------------- *)
fun Shift_C_typ a b =
Shift_C_DecodeRegShift_rwt
|> Q.SPECL [a, b]
|> Drule.SPEC_ALL
|> REWRITE_RULE []
|> Conv.CONV_RULE
(Conv.LHS_CONV (Conv.DEPTH_CONV bitstringLib.v2w_n2w_CONV)
THENC REWRITE_CONV [DecodeRegShift_rwt])
val Shift_C_LSL_rwt =
EV [Shift_C_def, LSL_C_def] [] []
``Shift_C (value,SRType_LSL,0,carry_in)
: m0_state -> ('a word # bool) # m0_state``
|> hd
val Shift_C_rwt =
EV [Shift_C_def, LSL_C_def, LSR_C_def, ASR_C_def, ROR_C_def, RRX_C_def] [] []
``Shift_C (value,typ,amount,carry_in)
: m0_state -> ('a word # bool) # m0_state``
|> hd
|> SIMP_RULE std_ss []
val SND_Shift_C_rwt = Q.prove(
`!s. SND (Shift_C (value,typ,amount,carry_in) s) = s`,
Cases_on `typ` \\ lrw [Shift_C_rwt]) |> Drule.GEN_ALL
(* ---------------------------- *)
fun unfold_for_loop n thm =
thm
|> REWRITE_RULE [utilsLib.for_thm (n,0), BitCount]
|> Drule.SPEC_ALL
|> Conv.CONV_RULE (Conv.X_FUN_EQ_CONV st)
|> Drule.SPEC_ALL
|> Conv.RIGHT_CONV_RULE
(PairedLambda.GEN_BETA_CONV
THENC PairedLambda.let_CONV
THENC PairedLambda.let_CONV
THENC REWRITE_CONV []
THENC Conv.ONCE_DEPTH_CONV PairedLambda.GEN_BETA_CONV
)
val abs_body = snd o Term.dest_abs
local
fun let_body t = let val (_, _, b) = pairSyntax.dest_plet t in b end
fun let_val t = let val (_, b, _) = pairSyntax.dest_plet t in b end
fun cond_true t = let val (_, b, _) = boolSyntax.dest_cond t in b end
val split_memA =
GSYM (Q.ISPEC `MemA x s : 'a word # m0_state` pairTheory.PAIR)
val dest_for = (fn (_, _, b) => b) o state_transformerSyntax.dest_for o
Term.rator
in
fun simp_for_body thm =
thm
|> Drule.SPEC_ALL
|> rhsc |> abs_body
|> let_body
|> let_body
|> let_val
|> Term.rand
|> dest_for
|> abs_body |> abs_body
|> (SIMP_CONV bool_ss [Once split_memA, pairTheory.pair_case_thm]
THENC Conv.DEPTH_CONV PairedLambda.GEN_LET_CONV
THENC SIMP_CONV std_ss [cond_rand_thms])
end
fun upto_enumerate n thm =
Drule.LIST_CONJ (List.tabulate (n, fn i =>
let
val t = numSyntax.term_of_int i
in
Thm.CONJ (thm |> Thm.SPEC t |> numLib.REDUCE_RULE)
(numLib.REDUCE_CONV ``^t + 1``)
end))
(* -- *)
val count_list_8 = EVAL ``COUNT_LIST 8``
val count_list_9 = EVAL ``COUNT_LIST 9``
val () = resetThms ()
local
val LDM_UPTO_SUC = upto_enumerate 7 m0_stepTheory.LDM_UPTO_SUC
val LDM_lem = simp_for_body dfn'LoadMultiple_def
val LDM_thm = unfold_for_loop 7 dfn'LoadMultiple_def
fun FOR_BETA_CONV i tm =
let
val b = pairSyntax.dest_snd tm
val (b, _, _) = boolSyntax.dest_cond (abs_body (rator b))
val n = fst (wordsSyntax.dest_word_bit b)
val _ = numLib.int_of_term n = i orelse raise ERR "FOR_BETA_CONV" ""
val thm =
write'R_name_rwt
|> Q.INST [`n` |-> `n2w ^n`]
|> utilsLib.FULL_CONV_RULE wordsLib.WORD_EVAL_CONV
in
(Conv.RAND_CONV
(PairedLambda.GEN_BETA_CONV
THENC Conv.REWR_CONV LDM_lem
THENC utilsLib.INST_REWRITE_CONV [MemA_4_rwt, thm])
THENC REWRITE_CONV [cond_rand_thms, LDM_UPTO_components,
LDM_UPTO_0, LDM_UPTO_SUC]) tm
end
val LDM =
LDM_thm
|> Conv.RIGHT_CONV_RULE
(REWRITE_CONV [R_name_rwt, ASSUME ``n <> 15w: word4``]
THENC Conv.EVERY_CONV
(List.tabulate
(8, fn i => Conv.ONCE_DEPTH_CONV (FOR_BETA_CONV i))))
|> utilsLib.ALL_HYP_CONV_RULE
(utilsLib.WGROUND_CONV
THENC REWRITE_CONV
[alignmentTheory.aligned_add_sub_123, Aligned_concat4,
LDM_UPTO_components]
THENC numLib.REDUCE_CONV)
val lem = Q.prove(
`!registers:word9. ~word_bit (w2n (13w: word4)) registers`,
simp [wordsTheory.word_bit_def]
)
in
val POP_rwt =
EV [LDM, LDM_UPTO_def, IncPC_rwt, LDM_UPTO_PC, write'R_name_rwt,
Aligned_SP, LoadWritePC_rwt, MemA_4_rwt, lem]
[[``~word_bit 8 (registers: word9)``],
[``word_bit 8 (registers: word9)``]] []
``dfn'LoadMultiple (T, 13w, registers)``
|> List.map (REWRITE_RULE [count_list_8, wordsTheory.word_mul_n2w] o
utilsLib.MATCH_HYP_CONV_RULE wordsLib.WORD_EVAL_CONV
``n2w a <> n2w b: word4`` o
utilsLib.ALL_HYP_CONV_RULE
(DATATYPE_CONV
THENC SIMP_CONV std_ss
[alignmentTheory.aligned_add_sub_123,
word_bit_0_of_load, wordsTheory.word_mul_n2w]
THENC DATATYPE_CONV))
|> addThms
val LoadMultiple_rwt =
EV [LDM, LDM_UPTO_def, IncPC_rwt, LDM_UPTO_PC, write'R_name_rwt,
Aligned_SP]
[[``~word_bit 8 (registers: word9)``,
``b = ~word_bit (w2n (n: word4)) (registers: word9)``]] []
``dfn'LoadMultiple (b, n, registers)``
|> List.map
(Drule.ADD_ASSUM ``n <> 13w: word4`` o
REWRITE_RULE
([boolTheory.COND_ID, count_list_8] @
List.drop
(utilsLib.mk_cond_update_thms [``:m0_state``], 3)))
|> addThms
end
(* -- *)
local
val STM_UPTO_SUC =
m0_stepTheory.STM_UPTO_SUC
|> Thm.INST_TYPE [Type.alpha |-> ``:8``]
|> SIMP_RULE (srw_ss()) []
|> upto_enumerate 7
val PUSH_UPTO_SUC =
m0_stepTheory.STM_UPTO_SUC
|> Thm.INST_TYPE [Type.alpha |-> ``:9``]
|> SIMP_RULE (srw_ss()) []
|> upto_enumerate 7
val STM_thm = unfold_for_loop 7 dfn'StoreMultiple_def
val PUSH_thm = Conv.RIGHT_CONV_RULE PairedLambda.let_CONV
(unfold_for_loop 8 dfn'Push_def)
val cond_lsb = Q.prove(
`i < 8 ==>
(word_bit (w2n n) r ==>
(n2w (LowestSetBit (r: word8)) = n: word4)) ==>
((if word_bit i r then
(x1, if (n2w i = n) /\ (i <> LowestSetBit r) then x2 else x3)
else
x4) =
(if word_bit i r then (x1, x3) else x4))`,
lrw [m0Theory.LowestSetBit_def, wordsTheory.word_reverse_thm,
CountLeadingZeroBits8]
\\ lrfs []
\\ lfs []
)
|> Drule.UNDISCH_ALL
fun FOR_BETA_CONV i tm =
let
val b = pairSyntax.dest_snd tm
val (b, _, _) =
boolSyntax.dest_cond
(snd (pairSyntax.dest_pair (abs_body (rator b))))
val n = fst (wordsSyntax.dest_word_bit b)
val _ = numLib.int_of_term n = i orelse raise ERR "FOR_BETA_CONV" ""
in
(Conv.RAND_CONV
(PairedLambda.GEN_BETA_CONV
THENC utilsLib.INST_REWRITE_CONV [cond_lsb]
THENC utilsLib.INST_REWRITE_CONV [write'MemA_4_rwt, R_name_rwt]
THENC REWRITE_CONV [])
THENC numLib.REDUCE_CONV
THENC REWRITE_CONV [cond_rand_thms, STM_UPTO_components,
STM_UPTO_0, STM_UPTO_SUC, PUSH_UPTO_SUC]) tm
end
fun rule thm =
thm
|> Conv.RIGHT_CONV_RULE
(REWRITE_CONV [R_name_rwt, SP_def, ASSUME ``n <> 15w: word4``]
THENC Conv.EVERY_CONV
(List.tabulate
(8, fn i => Conv.ONCE_DEPTH_CONV (FOR_BETA_CONV i))))
|> utilsLib.ALL_HYP_CONV_RULE
(numLib.REDUCE_CONV
THENC REWRITE_CONV
[alignmentTheory.aligned_add_sub_123, Aligned_concat4,
STM_UPTO_components]
THENC wordsLib.WORD_EVAL_CONV)
val STM = rule STM_thm
val PUSH = rule PUSH_thm
in
val StoreMultiple_rwt =
EV [STM, STM_UPTO_def, IncPC_rwt, write'R_name_rwt,
m0_stepTheory.R_x_not_pc, count_list_8] [[``n <> 13w: word4``]] []
``dfn'StoreMultiple (n, registers)``
|> addThms
val Push_rwt =
EV [PUSH, STM_UPTO_def, IncPC_rwt, LR_def, R_name_rwt, write'R_name_rwt,
write'MemA_4_rwt, write'SP_def, m0_stepTheory.R_x_not_pc,
count_list_8] [] []
``dfn'Push (registers)``
|> List.map
(utilsLib.ALL_HYP_CONV_RULE
(REWRITE_CONV [alignmentTheory.aligned_add_sub_123]
THENC wordsLib.WORD_EVAL_CONV) o
SIMP_RULE bool_ss
[wordsTheory.WORD_MULT_CLAUSES, wordsTheory.word_mul_n2w,
bit_count_9_m_8] o
REWRITE_RULE
(boolTheory.COND_ID ::
List.drop
(utilsLib.mk_cond_update_thms [``:m0_state``], 3)))
|> addThms
end
(* ----------- *)
local
val word_bit_conv = wordsLib.WORD_BIT_INDEX_CONV true
val map_word_bit_rule =
List.map (Conv.CONV_RULE (Conv.LHS_CONV word_bit_conv))
fun word_bit_thms n =
let
val v = bitstringSyntax.mk_vec n 0
fun wb i = wordsSyntax.mk_word_bit (numSyntax.term_of_int i, v)
in
List.tabulate (n, fn i => bitstringLib.word_bit_CONV (wb i))
end
val suc_rule =
Conv.CONV_RULE
(Conv.LHS_CONV (Conv.RATOR_CONV (Conv.RAND_CONV reduceLib.SUC_CONV)))
in
fun BIT_THMS_CONV n =
let
val wbit_thms = word_bit_thms n
val widx_thms = map_word_bit_rule wbit_thms
(* val dim_thm =
wordsLib.SIZES_CONV
(wordsSyntax.mk_dimindex (fcpSyntax.mk_int_numeric_type n))
val thms = ref ([dim_thm, wordsTheory.bit_count_def] @ wbit_thms) *)
val thms = ref wbit_thms
val c = ref (PURE_REWRITE_CONV (!thms))
fun bit_count_thms v =
let
fun upto_thm i =
wordsSyntax.mk_bit_count_upto (numSyntax.term_of_int i, v)
fun thm i t =
let
val thm =
wordsTheory.bit_count_upto_SUC
|> Drule.ISPECL [v, numSyntax.term_of_int (i - 1)]
|> suc_rule
in
i |> upto_thm
|> (Conv.REWR_CONV thm
THENC Conv.LAND_CONV (REWRITE_CONV widx_thms)
THENC Conv.RAND_CONV (Conv.REWR_CONV t)
THENC numLib.REDUCE_CONV)
end
fun loop a i =
if n < i then a else loop (thm i (hd a) :: a) (i + 1)
in
loop [Drule.ISPEC v wordsTheory.bit_count_upto_0] 1
end
in
fn tm =>
(!c) tm
handle Conv.UNCHANGED =>
let
val v =
HolKernel.find_term
(fn t =>
case Lib.total bitstringSyntax.dest_v2w t of
SOME (_, ty) =>
fcpSyntax.dest_int_numeric_type ty = n andalso
List.null (Term.free_vars t)
| NONE => false) tm
val () = thms := !thms @ (bit_count_thms v)
val () = c := PURE_REWRITE_CONV (!thms)
in
(!c) tm
end
end
end
val BIT_THMS_CONV_9 = BIT_THMS_CONV 9
val BIT_THMS_CONV_8 = BIT_THMS_CONV 8 ORELSEC BIT_THMS_CONV_9
local
val eq0_rwts = Q.prove(
`(NUMERAL (BIT1 x) <> 0) /\ (NUMERAL (BIT2 x) <> 0)`,
REWRITE_TAC [arithmeticTheory.NUMERAL_DEF, arithmeticTheory.BIT1,
arithmeticTheory.BIT2]
\\ DECIDE_TAC)
val count8 = rhsc count_list_8
(* val count9 = rhsc count_list_9 *)
val ok8 = Term.term_eq count8
(* val ok9 = Term.term_eq count9 *)
val STM1 = REWRITE_RULE [wordsTheory.word_mul_n2w] STM1_def
val LDM1_tm = Term.prim_mk_const {Thy = "m0_step", Name = "LDM1"}
val STM1_tm = Term.prim_mk_const {Thy = "m0_step", Name = "STM1"}
val f_tm = Term.mk_var ("f", Term.type_of ``m0_step$R_name b``)
val b_tm = Term.mk_var ("b", wordsSyntax.mk_int_word_type 32)
val r_tm = Term.mk_var ("r", ``:RName -> word32``)
val m_tm = Term.mk_var ("r", ``:word32 -> word8``)
val FOLDL1_CONV = Conv.REWR_CONV (Thm.CONJUNCT1 listTheory.FOLDL)
val FOLDL2_CONV = Conv.REWR_CONV (Thm.CONJUNCT2 listTheory.FOLDL)
val CONV0 = REWRITE_CONV [Thm.CONJUNCT1 wordsTheory.WORD_ADD_0, eq0_rwts]
val ONCE_FOLDL_LDM1_CONV =
(FOLDL2_CONV
THENC Conv.RATOR_CONV (Conv.RAND_CONV
(Conv.REWR_CONV LDM1_def
THENC Conv.RATOR_CONV (Conv.RATOR_CONV BIT_THMS_CONV_9)
THENC CONV0
THENC (Conv.REWR_CONV combinTheory.I_THM
ORELSEC Conv.RATOR_CONV (Conv.RAND_CONV
(Conv.RAND_CONV
(Conv.TRY_CONV BIT_THMS_CONV_9
THENC wordsLib.WORD_EVAL_CONV)
THENC PairedLambda.let_CONV))))))
val ONCE_FOLDL_STM1_CONV =
(FOLDL2_CONV
THENC Conv.RATOR_CONV (Conv.RAND_CONV
(Conv.REWR_CONV STM1
THENC Conv.RATOR_CONV (Conv.RATOR_CONV BIT_THMS_CONV_8)
THENC CONV0
THENC (Conv.REWR_CONV combinTheory.I_THM
ORELSEC (Conv.RATOR_CONV
(Conv.RATOR_CONV
(Conv.TRY_CONV BIT_THMS_CONV_8
THENC numLib.REDUCE_CONV)
THENC PairedLambda.let_CONV)
THENC PURE_REWRITE_CONV [combinTheory.o_THM])))))
val lconv = REPEATC ONCE_FOLDL_LDM1_CONV THENC FOLDL1_CONV
val sconv = REPEATC ONCE_FOLDL_STM1_CONV THENC FOLDL1_CONV
val lthms = ref ([]: thm list)
val sthms = ref ([]: thm list)
val lc = ref (PURE_REWRITE_CONV (!lthms))
val sc = ref (PURE_REWRITE_CONV (!sthms))
in
fun FOLDL_LDM1_CONV tm = (!lc) tm
handle Conv.UNCHANGED =>
let
val (f, r, l) = listSyntax.dest_foldl tm
val (ldm, f, b, v, s) =
case boolSyntax.strip_comb f of
(ld, [f, b, v, s]) => (ld, f, b, v, s)
| _ => raise ERR "FOLDL_LDM1_CONV" ""
val _ = Term.term_eq LDM1_tm ldm andalso ok8 l
orelse raise ERR "FOLDL_LDM1_CONV" ""
val df = Term.list_mk_comb (LDM1_tm, [f_tm, b_tm, v, st])
val thm = lconv (listSyntax.mk_foldl (df, r_tm, count8))
|> Drule.GEN_ALL
val () = lthms := thm :: (!lthms)
val () = lc := PURE_REWRITE_CONV (!lthms)
in
Drule.SPECL [s, r, f, b] thm
end
fun FOLDL_STM1_CONV tm = (!sc) tm
handle Conv.UNCHANGED =>
let
val (f, m, l) = listSyntax.dest_foldl tm
val (stm, f, b, v, s) =
case boolSyntax.strip_comb f of
(stm, [f, b, v, s]) => (stm, f, b, v, s)
| _ => raise ERR "FOLDL_STM1_CONV" ""
val _ = Term.same_const STM1_tm stm andalso ok8 l
orelse raise ERR "FOLDL_STM1_CONV" ""
val df = Term.list_mk_comb (stm, [f_tm, b_tm, v, st])
val thm = sconv (listSyntax.mk_foldl (df, m_tm, count8))
|> Drule.GEN_ALL
val () = lthms := thm :: (!lthms)
val () = sc := PURE_REWRITE_CONV (!lthms)
in
Drule.SPECL [s, m, f, b] thm
end
end
local
val word_bit_tm = ``word_bit a (v2w b : word9)``
val wb_cond_tm = ``if ~^word_bit_tm then r1 else r2: RName -> word32``
val wb_match = Lib.can (Term.match_term wb_cond_tm)
val wb_rule =
utilsLib.MATCH_HYP_CONV_RULE
(REWRITE_CONV [boolTheory.DE_MORGAN_THM, word_bit_9_expand])
val wb_rule_wb = wb_rule ``~^word_bit_tm``
val wb_rule_nowb = wb_rule word_bit_tm
in
fun split_wb_cond_rule wb thm =
let
val tm = rhsc thm
in
case Lib.total (HolKernel.find_term wb_match) tm of
SOME c =>
let
val (c, _, _) = boolSyntax.dest_cond c
in
if wb
then wb_rule_wb (REWRITE_RULE [ASSUME c] thm)
else wb_rule_nowb
(REWRITE_RULE [ASSUME (boolSyntax.dest_neg c)] thm)
end
| NONE => thm
end
end
local
val be_tm = hd (endian true)
val le_tm = hd (endian false)
fun endian_rule thm =
REWRITE_RULE
[ASSUME (if Lib.exists (aconv le_tm) (Thm.hyp thm)
then le_tm
else be_tm)] thm
fun NO_FREE_VARS_CONV tm =
if List.null (Term.free_vars tm)
then Conv.ALL_CONV tm
else Conv.NO_CONV tm
val LowestSetBit_CONV =
Conv.REWR_CONV m0Theory.LowestSetBit_def
THENC NO_FREE_VARS_CONV
THENC Conv.RAND_CONV bossLib.EVAL
THENC Conv.REWR_CONV m0_stepTheory.CountLeadingZeroBits8
THENC bossLib.EVAL
val BIT_COUNT_CONV =
Conv.REWR_CONV wordsTheory.bit_count_def
THENC Conv.RATOR_CONV (Conv.RAND_CONV wordsLib.SIZES_CONV)
THENC NO_FREE_VARS_CONV
THENC BIT_THMS_CONV_8
val bit_count_rule =
utilsLib.MATCH_HYP_CONV_RULE numLib.REDUCE_CONV ``~(a < 1n)`` o
utilsLib.FULL_CONV_RULE (Conv.DEPTH_CONV BIT_COUNT_CONV)
val word_bit_rule =
utilsLib.FULL_CONV_RULE
(utilsLib.WGROUND_CONV
THENC TRY_CONV BIT_THMS_CONV_8
THENC REWRITE_CONV [])
val mk_neq = boolSyntax.mk_neg o boolSyntax.mk_eq
fun mk_stm_wb_thm t =
let
val l = t |> boolSyntax.lhand
|> boolSyntax.rand
|> bitstringSyntax.dest_v2w |> fst
|> bitstringSyntax.bitlist_of_term
|> List.foldl
(fn (b, (i, a)) => (i - 1, if b then i :: a else a))
(7, [])
|> snd |> tl
val base = boolSyntax.rhs (boolSyntax.rand t)
val t2 =
List.map (fn i => mk_neq (base, wordsSyntax.mk_wordii (i, 4))) l
|> (fn [] => boolSyntax.T | x => boolSyntax.list_mk_conj x)
val eq_thm =
boolSyntax.list_mk_forall
(Term.free_vars base, boolSyntax.mk_eq (t, t2))
in
(*
set_goal ([], eq_thm)
*)
Tactical.prove(eq_thm, REPEAT Cases THEN EVAL_TAC)
end
val stm_rule1 =
utilsLib.MATCH_HYP_CONV_RULE
(Conv.RAND_CONV
(Conv.LHS_CONV (Conv.RAND_CONV (Conv.TRY_CONV LowestSetBit_CONV))))
``x ==> (n2w (LowestSetBit (l: word8)) = v2w q : word4)``
fun stm_rule2 thm =
case List.find boolSyntax.is_imp_only (Thm.hyp thm) of
SOME t =>
(case Lib.total mk_stm_wb_thm t of
SOME rwt =>
utilsLib.MATCH_HYP_CONV_RULE
(PURE_REWRITE_CONV [rwt]) ``x ==> (a: word4 = b)`` thm
| NONE => thm)
| NONE => thm
in
fun ldm_stm_rule s =
let
val s' = utilsLib.uppercase s
val ld = String.isPrefix "LDM" s'
in
if ld orelse String.isPrefix "POP" s'
then utilsLib.FULL_CONV_RULE numLib.REDUCE_CONV o endian_rule o
Conv.CONV_RULE (Conv.DEPTH_CONV FOLDL_LDM1_CONV) o
bit_count_rule o
word_bit_rule o
(if ld andalso s' <> "LDM"
then split_wb_cond_rule (String.isSubstring "(WB)" s')
else Lib.I)
else if String.isPrefix "STM" s' orelse String.isPrefix "PUSH" s'
then numLib.REDUCE_RULE o stm_rule2 o stm_rule1 o bit_count_rule o
endian_rule o
Conv.CONV_RULE (Conv.DEPTH_CONV FOLDL_STM1_CONV) o
word_bit_rule
else Lib.I
end
end
(*
val v8 = rhsc (bitstringLib.n2w_v2w_CONV ``0x1w: word8``)
val v8 = rhsc (bitstringLib.n2w_v2w_CONV ``0xFFw: word8``)
val v9 = rhsc (bitstringLib.n2w_v2w_CONV ``0x1w: word9``)
val v9 = rhsc (bitstringLib.n2w_v2w_CONV ``0x1FFw: word9``)
val tm =
``(FOLDL (m0_step$LDM1 f (s.REG (f n) + 4w) ^v9 s) s.REG
[0; 1; 2; 3; 4; 5; 6; 7])``
val tm =
``FOLDL (m0_step$STM1 f (s.REG (f n) + 4w) ^v8 s) s.MEM
[0; 1; 2; 3; 4; 5; 6; 7]``
Count.apply FOLDL_LDM1_CONV tm
Count.apply FOLDL_STM1_CONV tm
*)
(* ========================================================================= *)
(* Fetch *)
fun mk_bool_list l = listSyntax.mk_list (l, Type.bool)
local
val err = ERR "dest_bool_list" "bad Bool list"
in
fun dest_bool_list tm =
case Lib.total listSyntax.dest_list tm of
SOME (l, ty) => (ty = Type.bool orelse raise err; l)
| NONE => raise err
end
local
fun pad_opcode n =
let
val wty = fcpSyntax.mk_int_numeric_type n
in
fn v =>
let
val l = dest_bool_list v
val () = ignore (List.length l <= n
orelse raise ERR "pad_opcode" "bad Bool list")
in
(utilsLib.padLeft boolSyntax.F n l, wty)
end
end
fun mk_thumb2_pair l =
let
val l1 = mk_bool_list (List.take (l, 16))
val l2 = mk_bool_list (List.drop (l, 16))
in
pairSyntax.mk_pair (l1, l2)
end
val pad_16 = pad_opcode 16
val pad_32 = pad_opcode 32
val hex_to_bits_16 =
mk_bool_list o fst o pad_16 o bitstringSyntax.bitstring_of_hexstring
val hex_to_bits_16x2 =
mk_thumb2_pair o fst o pad_32 o bitstringSyntax.bitstring_of_hexstring
in
val split_thumb2_pat = mk_thumb2_pair o dest_bool_list
fun hex_to_bits s =
hex_to_bits_16 s
handle HOL_ERR {message = "bad Bool list", ...} =>
hex_to_bits_16x2 s
fun mk_opcode v =
case Lib.total pairSyntax.dest_pair v of
SOME (l, r) =>
let
val (opc1, ty) = pad_16 l
val (opc2, _) = pad_16 r
in
pairSyntax.mk_pair
(bitstringSyntax.mk_v2w (mk_bool_list opc1, ty),
bitstringSyntax.mk_v2w (mk_bool_list opc2, ty))
end
| NONE =>
let
val (opc, ty) = pad_16 v
in
bitstringSyntax.mk_v2w (mk_bool_list opc, ty)
end
end
local
val lem = Q.prove (
`(!p. ((if p then v2w [b1; b2; b3] else v2w [b4; b5; b6]) = 7w : word3) =
(if p then b1 /\ b2 /\ b3 else b4 /\ b5 /\ b6)) /\
(!p. ((if p then v2w [b1; b2] else v2w [b3; b4]) = 0w : word2) =
(if p then ~b1 /\ ~b2 else ~b3 /\ ~b4))`,
lrw []
\\ CONV_TAC (Conv.LHS_CONV bitstringLib.v2w_eq_CONV)
\\ decide_tac)
val CONC_RULE =
SIMP_RULE (srw_ss()++boolSimps.LET_ss)
[bitstringTheory.fixwidth_def, bitstringTheory.field_def,
bitstringTheory.shiftr_def, bitstringTheory.w2w_v2w, lem] o
ONCE_REWRITE_RULE [bitstringTheory.word_concat_v2w_rwt]
val lem =
Drule.LIST_CONJ
[simpLib.SIMP_CONV (srw_ss()++wordsLib.WORD_EXTRACT_ss) []
``(15 >< 13) (((w1:word8) @@ (w2:word8)) : word16) : word3``,
simpLib.SIMP_CONV (srw_ss()++wordsLib.WORD_EXTRACT_ss) []
``(12 >< 11) (((w1:word8) @@ (w2:word8)) : word16) : word2``,
simpLib.SIMP_CONV (srw_ss()) [] ``a + 2w + 1w : word32``]
val rule =
CONC_RULE o
ASM_REWRITE_RULE [cond_rand_thms, lem,
bitstringTheory.word_extract_v2w, bitstringTheory.word_bits_v2w]
val ALIGNED_PLUS_RULE =
MATCH_HYP_RW [alignmentTheory.aligned_add_sub_123,
alignmentTheory.aligned_numeric]
``aligned c (a + b : 'a word)``
val thumb2_test_tm =
fix_datatype
``((15 >< 13) (FST (MemA (^st.REG RName_PC,2) s): word16) = 7w: word3) /\
(12 >< 11) (FST (MemA (^st.REG RName_PC,2) s): word16) <> 0w: word2``
val not_thumb2_test_tm = boolSyntax.mk_neg thumb2_test_tm
val byte_tms = List.map fix_datatype
[``^st.MEM (^st.REG RName_PC) = ^(mk_byte 0)``,
``^st.MEM (^st.REG RName_PC + 1w) = ^(mk_byte 8)``,
``^st.MEM (^st.REG RName_PC + 2w) = ^(mk_byte 16)``,
``^st.MEM (^st.REG RName_PC + 3w) = ^(mk_byte 24)``]
val fetch_thumb_rwts =
EV [Fetch_def, MemA_2_rwt] [[not_thumb2_test_tm], [thumb2_test_tm]] []
``Fetch``
val fetch_thms =
[fetch_thumb_rwts
|> hd
|> Thm.DISCH not_thumb2_test_tm
|> Drule.ADD_ASSUM (List.nth (byte_tms, 0))
|> Drule.ADD_ASSUM (List.nth (byte_tms, 1))
|> Conv.CONV_RULE (utilsLib.INST_REWRITE_CONV [MemA_2_rwt])
|> rule,
fetch_thumb_rwts
|> tl |> hd
|> Thm.DISCH thumb2_test_tm
|> Drule.ADD_ASSUM (List.nth (byte_tms, 0))
|> Drule.ADD_ASSUM (List.nth (byte_tms, 1))
|> Drule.ADD_ASSUM (List.nth (byte_tms, 2))
|> Drule.ADD_ASSUM (List.nth (byte_tms, 3))
|> Conv.CONV_RULE
(utilsLib.INST_REWRITE_CONV [MemA_2_rwt] THENC DATATYPE_CONV)