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counter_hires_event.asm
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counter_hires_event.asm
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; SPDX-License-Identifier: GPL-3.0-or-later
;**************************************************************************
; FILE: counter_hires_event.asm *
; CONTENTS: Simple low-cost digital frequency meter using a PIC 16F628A *
; ORIGIN: Wolfgang Buescher, DL4YHF *
; (based on a work by James Hutchby, MadLab, 1996) *
; This software works only with hardware version COUNTER2: *
; PIC16F628A clocked with 20 MHz, 5 digits common cathode LEDs *
; The hardware is available as a kit from china: *
; "Crystal Oscillator Frequency Counter Tester" for ~10€ or $ *
; *
; REVISIONS: (latest entry first) *
; 2024-04-16 - Ho-Ro: *
; Version 1.0.00 *
; Reorganise RAM addresses, remove unused cells *
; No functional changes, reformat source code *
; 2024-04-05 - Ho-Ro: *
; Improve event counter, keep 00000 while key pressed *
; Reformat source code *
; 2024-03-22 - Ho-Ro: *
; Store 2 or 3 digit resolution option (<60 Hz) in EEPROM, *
; change with push button during low frequency measurement *
; 2024-03-20 - Ho-Ro: *
; Refactoring, move macros into own include file, *
; exchange steady/blinking dots: Hz, kHz steady, MHz blink *
; 2024-03-19 - Ho-Ro: *
; Store function (frequency measurement / event counter) *
; in EEPROM, change with push button during power up *
; 2024-03-17 - Ho-Ro: *
; Event counter fixed. *
; 2023-01-27 - Ho-Ro: *
; Event counter currently not working correctly -> disabled *
; 2021-03-27 - Ho-Ro: *
; Measure 256.0 Hz .. 999.9 Hz with 1 decimal *
; 2021-03-11 - Ho-Ro: *
; Increase display range to nnn MHz (measure up to 120 MHz) *
; 2021-03-05 - Ho-Ro: *
; Round values for ranges nnn kHz, n MHz and nn MHz *
; instead of cutting lower digits *
; 2021-02-28 - Ho-Ro: *
; Added TheHWcode's commit f16a1b0 (conv. range fix, bugfix) *
; Calibration support: apply exact 1 MHz (e.g. from GPDSO), *
; press button and adjust to 00000 (last digit = 1Hz = 1ppm) *
; 2021-02-26 - Ho-Ro: *
; 1 Hz resolution up to 99999 Hz (range < 101760 Hz) *
; hi-res (two decimals) up to 255.99 Hz *
; toggle three-decimals mode up to 60.999 Hz with key press *
; rewrote "DisplayFreq" to a more consistent layout *
; removed RPM measurement *
; enter event counting mode when key pressed at startup *
; 2019-06-28 - TheHWcave: added the capability to select counter mode *
; 2019-05-02 - TheHWcave: added the capability to select RPM measurement *
; using 1 pulse, 2, 3 or 4 pulses per revolution, which *
; allows measuring 2 bladed, 3 or 4 bladed fans or propellers*
; and extended the range for RPM display. Frequency range is *
; now up to 200 Hz in period measurement. In RPM mode above *
; 255 Hz the normal frequency is used for conversion up to *
; around 92100 RPM in all 3 modes *
; 2019-04-18 - TheHWcave: major change: removed all variants except #2 and*
; the programming and frequency offset bits. Instead I added *
; period measurement for frequencies below 100 Hz which are *
; now shown with 2 decimal points. Pressing the button *
; toggles between RPM and frequency format (for frequencies *
; below 100 Hz / below 9999 RPM. The last setting is stored *
; in EEPROM and becomes the default at power-up *
; 2018-03-23 - TheHWcave: Changed to always use 5 digits in *
; DISPLAY_VARIANT_2 and _3 and also use 1Hz resolution *
; (Range 1) for Range 2 because with 5 digits it makes sense *
; to use the best resolution for as long as possible *
; 2006-05-31 - Added the 'power-save' option which temporarily puts the *
; PIC to sleep (with only the watchdog-oscillator running) *
; 2006-05-15 - New entry in the preconfigured frequency table for 4-MHz *
; IF filters (like "Miss Mosquita" [Moskita] by DK1HE) *
; 2005-08-24 - Cured a bug in the COMMON ANODE decimal point setting. *
; (the "^0xFF" for the AND-mask was missing in macro 'conv') *
; 2005-03-21 - Added a few conditionals to use the same sourcecode *
; to drive a COMMON ANODE display ( DISPLAY_VARIANT_3 ) *
; 2004-03-14 - Fixed a range-switching bug around 8 MHz. *
; - Support TWO different display variants now, *
; optimized for different board layouts, and different clock *
; frequencies (4 MHz for variant 1, 20 MHz for variant 2). *
; 2004-03-05 - Added the feature to add or subtract a frequency offset. *
; 2004-02-18 - Migration to a PIC16F628 with 4 MHz crystal (el Cheapo) *
; - Changed the LED patterns '6' and '9' because they looked *
; like 'b' and 'q' in the old counter version. *
; - Added the auto-ranging feature *
; - Stepped from 24-bit to 32-bit integer arithmetic, to be *
; able to count 50 MHz with 1-second gate time, *
; or (at least) adjust ANY result for the ANY prescaler *
; division ratio, which may give pretty large numbers. *
; - A PIC16F628 worked up to 63 MHz with this firmware. *
;**************************************************************************
; Source code is suitable for gpasm under Debian Linux.
PROCESSOR 16F628A
; set radix for constants, system default is hex
; hex 0x20
; dec D'128' or .128
; bin B'10101010'
RADIX DEC ; use decimal notation as default - bye-bye (ugly) leading dot
INCLUDE <p16f628a.inc> ; processor specific definitions
INCLUDE "macros.inc" ; 16 and 32 bit arithmetic macros
#DEFINE DEBUG 0 ; DEBUG=1 for simulation, DEBUG=0 for real hardware
#DEFINE VERSION 0x1001 ; Version 1.0.01 store in IDLOCS
;**************************************************************************
; *
; Summary *
; *
;**************************************************************************
; The software functions as a frequency meter with an input signal
; range of 1 Hz to ~ 100 MHz and with an short term accuracy of +/- 1Hz
; if the oscillator crystal is properly trimmed.
; Signal pulses are counted over a fixed time interval of 1/4 second to
; 1 second (gate time). High frequency pulses are counted over 1/4 s
; to make the meter more responsive with no loss of displayed accuracy.
; Pulses are counted using Timer 0 of the PIC,
; which is set to increment on rising edges on the TMR0 pin. The 8-bit
; hardware register is extended by software into a 32-bit pulse counter.
; If timer 0 rolls over (msb 1 -> 0) between successive polls then the
; high two bytes of the pulse counter are incremented.
; Timer 0 is unable to count more than one pulse per instruction cycle
; (per 4 clock cycles) so the prescaler is used at frequencies above
; 1MHz (4MHz clock / 4) and also to ensure that pulses are not lost
; between polls of timer 0 (which would happen if more than 128 pulses were
; received). Fortunately the prescaler is an asynchronous counter
; which works up to a few ten MHz (sometimes as far as 60 MHz).
; Timing is based on a software loop of known execution period. The loop
; time is 20 us which gives integer counts to time 1 s and 1/4 s.
; During this timing loop, the multiplexed LED display is updated.
;
; To enable accurate low frequency measurenents, the timing loop also measures
; the period of the signal and accumulates these values over 1 second. This is
; later converted to a frequency value for frequencies < 1000 Hz.
;
; The frequency in binary is converted to decimal using a powers-of-ten
; lookup table. The binary powers of ten are repeatedly subtracted from
; the frequency to determine the individual decimal digits. The decimal
; digits are stored at the 9 bytes at 'digits'. Leading zeroes are then
; suppressed and the 5 significant digits are converted to LED data
; for the 7-segment displays using a lookup table.
; The signal frequency is displayed on five 7-segment displays.
; The displays are multiplexed which means that only one display is enabled
; at any one time. The variable 'disp_index' contains the index of the currently
; enabled display. Each display is enabled in turn at a sufficient frequency
; that no flicker is discernable. A prescaler ('disp_timer') is used
; to set the multiplexing frequency to a few hundred Hz.
; The display shows the signal frequency in Hz, kHz or MHz
; according to the following table:
; -------------------------
; | | DISPLAY |
; | Frequency | Freq mode |
; |-----------|-----------|
; | < 1 Hz | 0 |
; | 1 Hz | 1.000. | Two Hz-dots are steady (three-digits mode)
; | 10 Hz | 10.000. | Two Hz-dots are steady (three-digits mode)
; | 1 Hz | 1.00. | Two Hz-dots are steady
; | 10 Hz | 10.00. | Two Hz-dots are steady
; | 100 Hz | 100.00. | Two Hz-dots are steady
; | 255.99 Hz | 255.99. | Two Hz-dots are steady
; | 256 Hz | 256.0. | T.o Hz-dots are steady
; | 999.9 Hz | 999.9. | Two Hz-dots are steady
; | 1000 Hz | 1.000 | One kHz-dot is steady
; | 10.00 KHz | 10.000 | One kHz-dot is steady
; | 100.0 KHz | 100.00 | One kHz-dot is steady
; | 1.000 MHz | 1:0000 | One MHz-dot is flashing
; | 10.00 MHz | 10:000 | One MHz-dot is flashing
; | 100.0 MHz | 100:00 | One MHz-dot is flashing
; -------------------------
; '.': steady display dot
; ':': flashing display dot
; The flashing dots change their state with the measurement rate
;
; Three-digits mode
; Frequencies < 61 Hz can optionally be displayed with three decimal places,
; e.g. "50.123", whereby the measurement rate decreases.
; To switch between two- and three-digit mode, press the key until the mode changes.
; The selection is stored in EEPROM and active until changed with button press.
; The 61 Hz is a compromise between the computing time, which increases with
; the measurement frequency, and the possibility of precisely measuring the
; global mains frequencies of 50 Hz and 60 Hz.
; If there is no signal at all, a single zero is displayed in the 5th digit.
;
; Frequency zoom
; Holding down the button at frequencies between 100 kHz and 3.2 MHz
; switches to 1 s sample time and shows the 5 lowest digits with all
; dots blinking, yielding a dispolay resolution of 1 Hz. This allows
; to adjust the counter - apply an exact frequency of 1 MHz, e.g. from
; a GPSDO and adjust the counter until the display shows "00000".
; This gives a (short-term) accuracy of 1ppm.
;
; Event counting mode
; To enter the event counting mode, hold down the button during power-up
; until the message "Count" is shown. The setting is stored in EEPROM,
; the device will now start up as an event counter. To switch back to
; frequency counter hold down the button at startup until "FrEQ" is shown.
; Events are shown with leading zeros and without dots, e.g. "01234".
; Pressing the button at any time resets the counter back to zero.
;**************************************************************************
; *
; PIC config definitions *
; *
;**************************************************************************
; '__CONFIG' directive is used to embed configuration data within .asm file.
; The lables following the directive are located in the respective .inc file.
; See respective data sheet for additional information on configuration word.
;
; Since 2006-05-28, the watchdog must be ENABLED in the config word
; because of its wakeup-from-sleep function (see 'Sleep100ms').
; EX(16F84:) __CONFIG _CP_OFF & _WDT_ON & _PWRTE_ON & _RC_OSC
; Ho-Ro: sleep is not used anymore, WDT can be switched off
; display variants 2+3 : clocked with 20 MHz (needs "HS" oscillator)
__CONFIG _CP_OFF & _WDT_ON & _PWRTE_ON & _HS_OSC & _LVP_OFF & _BODEN_OFF & _MCLRE_OFF
; __CONFIG _CP_OFF & _WDT_OFF & _PWRTE_ON & _HS_OSC & _LVP_OFF & _BODEN_OFF & _MCLRE_OFF
; '__IDLOCS' directive may be used to set the 4 * 4 ID Location Bits.
; These shall be placed in the HEX file at addresses 0x2000...0x2003.
__IDLOCS VERSION
;**************************************************************************
; *
; Port assignments *
; *
;**************************************************************************
PORT_A_IO equ b'0000' ; port A I/O mode (all output)
PORT_B_IO equ b'00000000' ; port B I/O mode (all output)
LEDS_PORT equ PORTB ; 7-segment LEDs port
MUX_PORT equ PORTA ; display enable port
#define PUSH_BUTTON PORTA,5 ; digital input signal, active LOW
; switch mode, select special function,
; reset event counter
;**************************************************************************
; *
; Constants and timings *
; *
;**************************************************************************
; display variant 2 (the chinese clone) is clocked with 20 MHz (higher resolution)
CLOCK equ 20000000
; microseconds per timing loop
; clocked with 20 MHz
; 20 microseconds is possible with 20-MHz-Crystal,
; Make sure all gate times can be divided by this interval without remainder :
; 1 second / 20 us = 50000 (ok)
; 1/2 second / 20 us = 25000 (ok)
; 1/4 second / 20 us = 12500 (ok)
; 1/8 second / 20 us = 6250 (ok)
; 1/16 second / 20 us = 3125 (ok)
;
TIME equ 20
; Clock cycles per timing loop. See subroutine CountPulses.
; Usually CYCLES=400 (for 20 MHz crystal, 20 usec - loop)
CYCLES equ TIME*CLOCK/1000000
GATE_TIME_LOOPS equ CLOCK/CYCLES ; number of gate-time loops for ONE SECOND gate time
LAMPTEST_LOOPS equ CLOCK/(2*CYCLES) ; number of loops for a 0.5 SECOND lamp test after power-on
COUNTMODE_LOOPS equ CLOCK/(10*CYCLES) ; number of delay loops for display "count" (0.1 sec)
ONESECOND equ 50000 ; 1 second in 20 us units
PER2FREQ1 equ ONESECOND * 10 ; convert periods into HZ with 1 decimal point
PER2FREQ2 equ ONESECOND * 100 ; convert periods into HZ with 2 decimal points
PER2FREQ3 equ ONESECOND * 1000 ; convert periods into HZ with 3 decimal points
;**************************************************************************
; *
; File register usage *
; *
;**************************************************************************
; RAM memory (general purpose registers, unfortunately not the same for PIC16F84 & PIC16F628)
; in PIC16F628: RAM from 0x20..0x7F (96 bytes, 0x20.. only accessable in Bank0)
; 0xA0..0xEF (another 80 bytes in Bank1)
; 0x120..0x14F (another 48 bytes in Bank2)
; 0x0F0..0x0FF, 0x170..0x17F , 0x1F0..0x1FF are mapped to 0x70..0x7F (same in all banks)
; So use 0x70..0x7F for context saving in the PIC16F628 and forget 0x0F0.. 0xNNN !
;
; Note on the 32-bit integer arithmetics as used in this code:
; - They begin with MOST SIGNIFICANT BYTE in memory, but...
; - Every byte location has its own label here, which makes debugging
; with Microchip's simulator much easier (point the mouse on the name
; of a variable to see what I mean !)
;
; RAM start at 0x20
;
tens_index equ 0x20 ; index into the powers-of-ten table
divi equ 0x21 ; power of ten (32 bits)
divi_hi equ 0x21 ; SAME as 'divi' : HIGH byte
divi_mh equ 0x22 ; MEDIUM HIGH byte
divi_ml equ 0x23 ; MEDIUM LOW byte
divi_lo equ 0x24 ; LOW byte
timer0_old equ 0x25 ; previous reading from timer0 register
gatecnt equ 0x26 ; 16-bit counter (msb first)
gatecnt_hi equ 0x26 ; SAME location, msb
gatecnt_lo equ 0x27 ; lsb
bTemp equ 0x28 ; temporary 8-bit register,
; may be overwritten in ALL subroutines
freq equ 0x29 ; frequency in binary (32 bits)....
freq_hi equ 0x29 ; SAME location, begins with HIGH byte
freq_mh equ 0x2a ; ... medium high byte
freq_ml equ 0x2b ; ... medium low byte
freq_lo equ 0x2c ; ... low byte
freq2 equ 0x2d ; frequency too,
freq2_hi equ 0x2d ; SAME location, begins with HIGH byte
freq2_mh equ 0x2e ; ... medium high byte
freq2_ml equ 0x2f ; ... medium low byte
freq2_lo equ 0x30 ; ... low byte
pstart_hi equ 0x31 ; holds the gatecnt at start of period measurement (high byte)
pstart_lo equ 0x32 ; ... low byte
t0dark equ 0x33 ; counter mode only: value tmr0 increased during dark time (outside CountPulses)
t0last equ 0x34 ; counter mode only: value of tmr0 at the end of CountPulses
digits equ 0x35 ; frequency as decimal digits (9 bytes)...
digit_0 equ 0x35 ; SAME location as MOST SIGNIFICANT digit, 100-MHz
digit_1 equ 0x36 ; usually the 10-MHz-digit
digit_2 equ 0x37 ; usually the 1-MHz-digit
digit_3 equ 0x38 ; usually the 100-kHz-digit
digit_4 equ 0x39 ; usually the 10-kHz-digit
digit_5 equ 0x3a ; usually the 1-kHz-digit
digit_6 equ 0x3b ; usually the 100-Hz-digit
digit_7 equ 0x3c ; usually the 10-Hz-digit
digit_8 equ 0x3d ; usually the 1-Hz-digit
digit_9 equ 0x3e ; must contain a blank character (or trailing zero)
display0 equ 0x3f ; display #0 data
display1 equ 0x40 ; display #1 data
display2 equ 0x41 ; display #2 data
display3 equ 0x42 ; display #3 data
display4 equ 0x43 ; display #4 data
disp_index equ 0x44 ; index of the enabled display (0 to 4 for 5-digit display)
disp_timer equ 0x45 ; display multiplex timer (5 bits)
adjust_shifts equ 0x46 ; count of 'left shifts' to compensate prescaler+gate time
blinker equ 0x47 ; prescaler for the flashing 1 MHz-dot
period_waste equ 0x48 ; stores the number of cycle*4 to waste to make up the correct total
; ... number of instructions in the CountPulses loop
pcnt equ 0x49 ; number of periods measured
period_hi equ 0x4a ; accumulated period in 20us increments (high byte)
period_lo equ 0x4b ; ... low byte
pdiv_mh equ 0x4c ; used to store the final division result (bits 16..23)
pdiv_ml equ 0x4d ; ... bits 8..15
pdiv_lo equ 0x4e ; ... bits 0..7
modebits equ 0x4f ; special device modes
; 7 6 5 4 3 2 1 0
; 0 x x x - - - - = period measuring off (normal freq disp)
; 1 0 0 0 - - - - = PMODE: measure/show 10mHz
; 1 1 0 0 - - - - = PMODE + DEC_3: measure/show 1 mHz
; 1 0 1 0 - - - - = PMODE + DEC_1: measure/show 100 mHz
; 0 0 0 1 - - - - = FZOOM
#define PMODE modebits, 7 ; 0 = count signal edges, 1 = measure signal period
#define DEC_3 modebits, 6 ; 0 = normal, 1 = resolution 1 mHz
#define DEC_1 modebits, 5 ; 0 = normal, 1 = resolution 100 mHz
#define FZOOM modebits, 4 ; 0 = normal, 1 = measure 1 second and display lowest 5 digits
#define PMODE_MASK b'10000000'
#define DEC_3_MASK b'01000000'
#define DEC_1_MASK b'00100000'
#define FZOOM_MASK b'00010000'
#define MODES_MASK b'11110000' ; all possible special modes
options equ 0x50 ; persistent options, stored in EEPROM
; 7 6 5 4 3 2 1 0
; - - - - - - x 1 = EVENT: count events, period measuring off
; - - - - - - 1 x = MILLI: switch to mHz resolution below 61 Hz
#define EVENT options, 0 ; 0 = measure frequency, 1 = count events
#define MILLI options, 1 ; 0 = resolution 10 mHz, 1 = resolution 1 mHz
#define EVENT_MASK b'00000001'
#define MILLI_MASK b'00000010'
#define OPTION_MASK b'00000011' ; mask device options
;**************************************************************************
; *
; EEPROM content *
; *
;**************************************************************************
#define EEPROM_ADR_OPTIONS 0 ; EEPROM location for "options" (flags)
ORG 0x2100 ; EEPROM start address
de 0 ; "options" (flags), cleared by default
;**************************************************************************
; *
; Program start *
; *
;**************************************************************************
ORG 0x0000 ; processor reset vector
goto MainInit ; go to beginning of program
; (begin of ROM is too precious to waste for ordinary code, see below...)
;**************************************************************************
; *
; Lookup tables *
; Must be at the start of the code memory to avoid crossing pages !! *
; *
;**************************************************************************
;--------------------------------------------------------------------------
; 7-segment LED data table
;--------------------------------------------------------------------------
; Index 0..9 used for decimal numbers, all other indices defined below :
CHAR_A equ 10 ; Letters A..F = HEX digits, index 10..15
CHAR_b equ 11 ;
CHAR_C equ 12 ;
CHAR_d equ 13 ;
CHAR_E equ 14 ;
CHAR_F equ 15 ;
CHAR_o equ 16 ; Other letters used in "Count"
CHAR_u equ 17 ;
CHAR_n equ 18 ;
CHAR_t equ 19 ;
CHAR_r equ 20 ; Other letters used in "FrEQ"
CHAR_Q equ 21 ;
BLANK equ 22 ; blank display
TEST equ 23 ; power-on display test
DPPOINT_BIT equ 1 ; decimal point bit (same for all digits)
#define _A 0x40 ; bitmask for segment A , etc ..
#define _B 0x80
#define _C 0x04
#define _D 0x01
#define _E 0x08
#define _F 0x10
#define _G 0x20
#define _DP 0x02
BLANK_PATTERN equ b'00000000' ; blank display pattern (7-segment code)
;-----------------------------------------------------------------------------
; Table to convert a decimal digit or a special character into 7-segment-code
; Note: In DL4YHF's PIC counter, all digits have the same segment connections,
; so we do not need individual conversion tables for all segments.
;
; AAAA
; F B
; F B
; GGGG
; E C
; E C
; DDDD DP
;
;-----------------------------------------------------------------------------
Digit2SevenSeg:
addwf PCL,f ; caution: this is 'PCL' only, not 'PC'. Beware of page borders.
; A = 0, B = 1, C = 5, D = 3, E = 2, F = 6, G = 7, DP = 4
#define SSEG_XORMASK 0x00 ; for COMMON CATHODE: No bitwise EXOR to the pattern
; digits 0..9
retlw (_A+_B+_C+_D+_E+_F )^SSEG_XORMASK ; ABCDEF. = '0' ( # 0 )
retlw ( _B+_C )^SSEG_XORMASK ; .BC.... = '1' ( # 1 )
retlw (_A+_B +_D+_E +_G)^SSEG_XORMASK ; AB.DE.G = '2' ( # 2 )
retlw (_A+_B+_C+_D +_G)^SSEG_XORMASK ; ABCD..G = '3' ( # 3 )
retlw ( _B+_C +_F+_G)^SSEG_XORMASK ; .BC..FG = '4' ( # 4 )
retlw (_A +_C+_D +_F+_G)^SSEG_XORMASK ; A.CD.FG = '5' ( # 5 )
retlw (_A +_C+_D+_E+_F+_G)^SSEG_XORMASK ; A.CDEFG = '6' ( # 6 )
retlw (_A+_B+_C )^SSEG_XORMASK ; ABC.... = '7' ( # 7 )
retlw (_A+_B+_C+_D+_E+_F+_G)^SSEG_XORMASK ; ABCDEFG = '8' ( # 8 )
retlw (_A+_B+_C+_D +_F+_G)^SSEG_XORMASK ; ABCD.FG = '9' ( # 9 )
; hexdigits A..F
retlw (_A+_B+_C +_E+_F+_G)^SSEG_XORMASK ; ABC.EFG = 'A' ( # 10 )
retlw ( _C+_D+_E+_F+_G)^SSEG_XORMASK ; ..CDEFG = 'b' ( # 11 )
retlw (_A+ _D+_E+_F )^SSEG_XORMASK ; ...DE.G = 'C' ( # 12 )
retlw ( _B+_C+_D+_E +_G)^SSEG_XORMASK ; .BCDE.G = 'd' ( # 13 )
retlw (_A +_D+_E+_F+_G)^SSEG_XORMASK ; A..DEFG = 'E' ( # 14 )
retlw (_A +_E+_F+_G)^SSEG_XORMASK ; A...EFG = 'F' ( # 15 )
; A few more letters for text "count"
retlw ( _C+_D+_E +_G)^SSEG_XORMASK ; ..CDE.G = 'o' ( # 16 )
retlw ( _C+_D+_E )^SSEG_XORMASK ; ..CDE.. = 'u' ( # 17 )
retlw ( _C +_E +_G)^SSEG_XORMASK ; ABC.EF. = 'n' ( # 18 )
retlw ( _D+_E+_F+_G)^SSEG_XORMASK ; ...DEFG = 't' ( # 19 )
retlw ( +_E +_G)^SSEG_XORMASK ; ABC.EFG = 'r' ( # 20 )
retlw (_A+_B+_C+_D+_E+_F+_DP)^SSEG_XORMASK; ABC.EFG+DP = 'Q' ( # 21 )
; blank and test pattern
retlw (BLANK_PATTERN )^SSEG_XORMASK ; ....... = ' ' ( # 22 )
retlw (b'11111111' )^SSEG_XORMASK ; all segments on ( # 23 )
;--------------------------------------------------------------------------
; Table to control which 7-segment display is enabled. Displays are usually
; COMMON CATHODE (variants 1+2) so pulled low to enable.
; For DISP_VARIANT=3 (COMMON ANODE), the digit-driving pattern is inverted.
; Input: W = 0 means the MOST SIGNIFICANT DIGIT (the leftmost one), etc.
; Result: VALUE to be written to MUX_PORT to activate the digit
;--------------------------------------------------------------------------
;
Digit2MuxValue: ;
addwf PCL, f ; caution: this is 'PCL' only, not 'PC'
; Note: If the program counter is affected, a command requires two instruction cycles (=8 osc cycles)
; muliplexer values (5 digits, COMMON CATHODE) :
retlw b'11110111' ; 1st most significant digit is on PA3 (!)
retlw b'11111011' ; 2nd next less significant dig. on PA2 (!)
retlw b'11111110' ; 3rd next less significant dig. on PA0 (!!)
retlw b'11111101' ; 4th next less significant dig. on PA1 (!!)
retlw b'11111111' ; 5th least significant digit = NOT (PA3+PA2+PA1+PA0)
;--------------------------------------------------------------------------
; Powers-of-ten table (32 bits, most significant byte first)
; Based on an idea by James Hutchby (MadLab, 1996).
; Modified for 32-bit arithmetic by Wolfgang Buescher (2004).
;--------------------------------------------------------------------------
;
TensTable:
addwf PCL, f
CQUAD 100000000 ; 100 million is sufficient for the counter itself
CQUAD 10000000
CQUAD 1000000
CQUAD 100000
CQUAD 10000
CQUAD 1000
CQUAD 100
CQUAD 10
CQUAD 1
TensTableSize equ 9*4
;**************************************************************************
;
; main entry point
;
;**************************************************************************
;
MainInit:
movlw PORT_A_IO ; initialise port A
errorlevel -302 ; Turn off banking message for the next few instructions..
bsf STATUS, RP0 ;! setting RP0 enables access to TRIS regs
movwf PORTA ;! looks like PORTA but is in fact TRISA
bcf STATUS, RP0 ;! clearing RP0 enables access to PORTs
clrf PORTA
movlw PORT_B_IO ; initialise port B
bsf STATUS, RP0 ;! setting RP0 enables access to TRIS regs
movwf PORTB ;! looks like PORTB but is in fact TRISB
bcf STATUS, RP0 ;! clearing RP0 enables access to PORTs
errorlevel +302 ; Enable banking message again
clrf PORTB
clrf disp_index ; initialise display index and
clrf disp_timer ; display multiplex timer
movlw BLANK ; blank character as dummy ...
movwf digit_8 ; for the lowest frequency display range
IF (DEBUG == 1)
movlw TEST ; test all LED segments
call ConvChar0
movlw TEST
call ConvChar1
movlw TEST
call ConvChar2
movlw TEST
call ConvChar3
movlw TEST
call ConvChar4
; Do a LAMP TEST for half a second, including all decimal points :
MOVLx16 LAMPTEST_LOOPS, gatecnt
call CountPulses ; some delay to show the test pattern
ENDIF
; Blank the display until 1st measurement is available :
call ClearDisplay
movlw PSC_DIV_BY_256 ; let the prescaler divide by 256 while testing..
call SetPrescaler ; safely write <W> into option register
clrf modebits ; set default mode (frequency counter)
movlw options ; destination address for reading from EEPROM..
movwf FSR ;
movlw EEPROM_ADR_OPTIONS ; load EEPROM-internal offset of "options"-byte
call EEPROM_ReadByte ; read single byte from EEPROM: options := EEEPROM[W]
movlw OPTION_MASK ; restore only the valid options
andwf options, f
clrf bTemp ; clear button press marker
switch_mode:
btfsc PUSH_BUTTON ; check the switch
goto save_mode ; not pressed: save and go ...
bsf bTemp, 0 ; remenber the pressed state
movlw EVENT_MASK ; pressed: switch to next setting
xorwf options, f ; change mode
call ShowMode
movlw (LAMPTEST_LOOPS)>>8 ; high byte for 0.5 second lamp test
movwf gatecnt_hi
movlw (LAMPTEST_LOOPS)&0xff ; low byte for 0.5 second lamp test
movwf gatecnt_lo
call CountPulses
goto switch_mode
save_mode:
btfss bTemp, 0 ; button was not pressed and released
goto MainLoop ; .. do not write EEPROM
movlw OPTION_MASK ; save only the options
andwf options, f
movlw options ; .. and store in EEPROM
movwf FSR
movlw EEPROM_ADR_OPTIONS ; load EEPROM-internal offset of "options"-byte
call EEPROM_WriteByte
;--------------------------------------------------------------------------
;
; main loop : Preparation, auto ranging, measurement, conversion, display
;
;--------------------------------------------------------------------------
;
MainLoop:
clrf freq2_hi ; clear counter (for counter mode)
clrf freq2_mh ; bits 23..16
clrf freq2_ml ; bits 15..8
clrf freq2_lo ; bits 7..0
clrf t0dark
clrf t0last
; re-initialise ports
; ex: tris PORTA; tris PORTB
errorlevel -302 ; Turn off banking message for the next few instructions..
bsf STATUS, RP0 ;! setting RP0 enables access to TRIS regs
movlw PORT_A_IO ;!
movwf PORTA ;! looks like PORTA but is in fact TRISA
movlw PORT_B_IO ;!
movwf PORTB ;! looks like PORTB but is in fact TRISB
bcf STATUS, RP0 ;! clearing RP0 enables access to PORTs
clrwdt ; configure TMR0... but clear watchdog timer first
movlw b'00100000' ; value for OPTION reg: edge - low-to-high transition,
; + prescaler assigned to Timer 0, 1:2
bsf STATUS, RP0 ;! setting RP0 enables access to OPTION reg
; option register is in bank1. i know. thanks for the warning.
movwf OPTION_REG ;! ex: "option" command (yucc)
bcf STATUS, RP0 ;! clearing RP0 for normal register access
errorlevel +302 ; Enable banking message again
; check for event counting
btfsc EVENT ; if in event mode
goto EventCount ; .. enter event counting
; First do a 'range-detection measurement' to find
; a suitable prescaler ratio. Worst-case-estimation:
; 50 MHz at the input of the async TIMER 0 prescaler
; requires a prescaler ratio of 64 because
; the synchron counter in TIMER 0 accepts a maximum
; frequency of f_osc / 4, here: max. 1 MHz.
; The theoretic maximum frequency is 64 MHz then, which
; was almost reached when tested with a PIC 16F628.
; The range-detection interval is somewhere near 1/25 seconds (see RANGE_DET_LOOPS),
; so frequencies below 25*64 = 1600 Hz are not detectable at this step.
RANGE_DET_LOOPS equ CLOCK/(25*CYCLES) ; number of gate-time loops to detect the MEASURING RANGE
; (which is required to find a good prescaler value)
MOVLx16 RANGE_DET_LOOPS, gatecnt ; RANGE DETECTION loop counter
movlw PSC_DIV_BY_64 ; let the prescaler divide by 64 while testing..
call SetPrescaler ; safely write <W> into option register
call CountPulses ; count pulses for the range detection interval (1/25 sec)
; The result will be placed in freq_lo,freq_ml,freq_mh,freq_hi (32 bit)
; but the max count at 64 MHz input, 1/25 sec gate time, and prescaler=64 will be:
; 64MHz / (25 * 64) = 40000 pulses, so only 16 bits in the counter
; are required here (call them "testcount", f_in = testcount * 25*64).
; The frequency resolution of this coarse measurement is 64*25 Hz = 1.6 kHz.
; (for that reason it's not suited for "wake-up from power-save on frequency-change")
; Load the default (soft-)counters for the GATE TIME.
; Most measuring ranges use a 1/2 second gate time !
MOVLx16 GATE_TIME_LOOPS/2, gatecnt ; gate time
; Increment the "blinker" once every 0.25 seconds.
; If the gate time is longer, flashing will be slower -> showing sample rate.
incf blinker, f
; Look at the range-detection count ("testcount")
; and decide which measuring range to use, beginning with the highest frequency range.
;
; Even if PIC clocked with 20MHz, keep the input of TIMER0 below 4(!) MHz.
; Also hi and low time of the input signal must be > 2 * Tosc + 20 ns = 120 ns
;
; TheHWcave 2021-02-27:
; "The v2 version fixes a problem discovered by a user (Haim)
; of Wolf's original firmware when measuring frequencies in the range 1 .. 4 MHz.
; It is also present in my changed firmware. Below 4MHz is the highest frequency range
; the PIC measures without pre-scaler. If you measure signals with a duty cycle;
; significantly different from 50% in that range, the pulse width can drop;
; below the 120ns required by the PIC. This causes the PIC to show fluctuating values
; and it is quite obvious when it happens.
; It is more likely to happen if no pre-amp is used but can happen even with a pre-amp.
; The fix is to use the pre-scaler earlier (above 983KHz) because that reduces
; the required pulse-width significantly. This reduces the measurement resolution
; from 4Hz to 8Hz in the range from 1..4MHz but is no issue because we can anyway
; only see the top 5 digits (display resolution 100Hz)."
; Ranges for 20 MHz CRYSTAL (Loop time = 1/25 s)
; Range testcount f_in presc. gate_time resol. last digit step
; (1) 0..63 .. 100 kHz 1 1 second 1 Hz 1
; (2) 64..255 .. 408 kHz 2 1 second 2 Hz 1
; (2) 256..511 .. 817 KHz 2 1 second 2 Hz 1
; (2) 512..1023 .. 1.6 MHz 2 1 second 2 Hz 1
; (4) 1024..2047 .. 3.2 MHz 2 1/2 second 4 Hz 1
; (8) 2048..4095 .. 6.5 MHz 4 1/2 second 8 Hz 1
; (16) 4096..8191 .. 13 MHz 8 1/2 second 16 Hz 1
; (32) 8192..16383 .. 26 MHz 16 1/2 second 32 Hz 1
; (64) 16384..32767 .. 52 MHz 32 1/2 second 64 Hz 1
; (64) 32768..40000 .. 64 MHz 32 1/2 second 64 Hz 1
;
movf freq_ml, w ; first look at bits 15..8 of the 'test count' result
andlw b'11000000' ; any of bits 15..14 set (>=16384, 26 MHz..) -> no Z flag -> range 64
btfss STATUS, Z ; skip next instruction if ZERO-flag set (!)
goto range64 ; far jump -> range 64
btfsc freq_ml, 5 ; bit 13 set (>=8192, 13 MHz..) -> range 32
goto range32
btfsc freq_ml, 4 ; bit 12 set (>=4096, 6.5 MHZ..) -> range 16
goto range16
btfsc freq_ml, 3 ; bit 11 set (>=2048, 3.2 MHz..) -> range 8
goto range8
btfsc freq_ml, 2 ; bit 10 set (>=1024, 1.6 MHz..) -> range 4 (with "zoom" option)
goto range4
btfsc freq_ml, 1 ; bit 9 set (>=512, 817 kHz..) -> range 2 (with "zoom" option)
goto range2
btfsc freq_ml, 0 ; bit 8 set (>=256, 408 kHz) -> range 2 (with "zoom" option)
goto range2
movf freq_lo, w ; now look at bits 7..0 only ..
sublw 62 ; subtract #62 - W register -> C=0 if result negative
btfss STATUS, C ; skip next instruction if C=1 (#62-W >= 0)
goto range2 ; freq > 100 kHz -> range 2 (with "zoom" option)
goto range1 ; .. else: -> range 1
range1_zoom:
; come her with a frequency of 100 kHz .. 3.2 MHz
; measure one second and show the 5 low digits with 1Hz resolution
; this allows e.g. to calibrate the quartz oscillator circuit:
; apply exact 1 or 2 MHz - e.g. from GPSDO - and adjust the display to 00000
; max input frequency w/o prescaler is 4 MHz (t_hi = t_lo > 120 ns)
bsf FZOOM ; use "display_calibrate" later to show low 1 Hz res
range1:
; async prescaler off, 1 second gate time for low frequencies
call PrescalerOff ; turn hardware prescaler off
; Load the GATE TIMER (as count of loops) for this measuring range.
MOVLx16 GATE_TIME_LOOPS,gatecnt ; 1 second gate time
; Load the count of "left shifts" to compensate gate time + prescaler :
movlw 0 ; no need to multiply with prescaler 1:1 and 1-sec gate time
goto go_measure
range2:
btfss PUSH_BUTTON ; if "zoom" switch is low (pressed) ..
goto range1_zoom ; .. calibration zoom
; async prescaler /2 , gate time = 1 second
movlw PSC_DIV_BY_2 ; let the prescaler divide by 2 while MEASURING...
call SetPrescaler ; safely write <W> into option register
; Load the GATE TIMER (as count of loops) for this measuring range.
MOVLx16 GATE_TIME_LOOPS, gatecnt ; 1 second gate time
; Load the count of "left shifts" to compensate gate time + prescaler :
movlw 1 ; multiply by 2 (=2^1) later to compensate prescaling (1/2)
goto go_measure
range4:
btfss PUSH_BUTTON ; if switch is low (pressed) ..
goto range1_zoom ; .. calibration zoom
; async prescaler /2 , gate time = default (1/2 second)
movlw PSC_DIV_BY_2 ; let the prescaler divide by 2 while MEASURING...
call SetPrescaler ; safely write <W> into option register
; Load the GATE TIMER (as count of loops) for this measuring range.
; MOVLx16 GATE_TIME_LOOPS/.2, gatecnt ; 1/2 second gate time
; Load the count of "left shifts" to compensate gate time + prescaler :
movlw 2 ; multiply by 4 (=2^2) later to compensate prescaling (1/2) * gate time (1/2 s)
goto go_measure
range8:
; async prescaler /4, gate time = default (1/2 second)
movlw PSC_DIV_BY_4 ; let the prescaler divide by 4 while MEASURING...
call SetPrescaler ; safely write <W> into option register
movlw 3 ; multiply by 8 (=2^3) later to compensate prescaling (1/4) * gate time (1/2 s)
goto go_measure
range16:
; async prescaler /8, gate time = default (1/2 second)
movlw PSC_DIV_BY_8 ; let the prescaler divide by 8 while MEASURING...
call SetPrescaler ; safely write <W> into option register
movlw 4 ; multiply by 16 (=2^4) later to compensate prescaling (1/8) * gate time (1/2 s)
goto go_measure
range32:
; async prescaler /16, gate time = default (1/2 second)
movlw PSC_DIV_BY_16 ; let the prescaler divide by 16 while MEASURING...
call SetPrescaler ; safely write <W> into option register
movlw 5 ; multiply by 32 (=2^5) later to compensate prescaling (1/16) * gate time (1/2 s)
goto go_measure
range64:
; async prescaler /32, gate time = default (1/2 second)
movlw PSC_DIV_BY_32 ; let the prescaler divide by 32 while MEASURING...
call SetPrescaler ; safely write <W> into option register
movlw 6 ; multiply by 64 (=2^6) later to compensate prescaling (1/32) * gate time (1/2 s)
go_measure:
movwf adjust_shifts ; save the number of "arithmetic left shifts" for later
; measure frequency
call CountPulses ; count pulses for 1, 1/2, 1/4, or 1/8 s
; Result in freq_lo,freq_ml,freq_mh,freq_hi (32 bit) now,
; NOT adjusted for the gate-time or prescaler division ratio yet.
prep_disp:
; Prepare the frequency (32-bit 'unadjusted' integer) for display:
; Multiply freq by 2^adjust_shifts to adjust for the prescaling
; and the timing period. The result will be a frequency in HERTZ, 32-bit integer.
; Note: the adjustment factor may be ONE which means no shift at all.
tstf adjust_shifts
BZ no_adjust
adjust: clrc
rlf freq_lo, f
rlf freq_ml, f
rlf freq_mh, f
rlf freq_hi, f
decfsz adjust_shifts, f
goto adjust
no_adjust: ; Check the result against under- and overflow.
; (There should be none if the frequency didn't change too rapidly
; between the range-detection and the actual measurement )
movf freq_hi, w ; underflow (freq = 0) ?
iorwf freq_mh, w
iorwf freq_ml, w
iorwf freq_lo, w
BZ FreqUnderflow ; show " 0"
btfsc freq_hi, 7 ; if overflow (freq > 7fffffffh) ?
goto FreqOverflow ; show "E "
MOVLx32 999, freq2
SUBx32 freq, freq2 ; C = ( freq < 1000 )
BNC f_hirange ; frequencies >= 1000 Hz go to extended range check
; frequency is < 1000 Hz.
p_zero: movf pcnt, f ; zero periods? This could happen at very low
btfss STATUS, Z ; .. freqencies < 2Hz.
goto p_conv ; .. we must avoid dividing by zero
movlw 1 ; .. by preset to 1 x 1s period = 1Hz
movwf pcnt
movlw (ONESECOND>>8) & 0xff
movwf period_hi
movlw ONESECOND & 0xff
movwf period_lo
; TheHWcave:
; This section adjusts the conversion factor for the number
; of periods we have measured. When we later divide by the
; sum of the measured periods, we effectively average
; across the number of periods
;
; conversion = conversion * number_of_periods (pcnt)
;
; the multiplication is done by repeated adding and it gets
; big, so 32-bit mode is needed
;
;
p_conv: ; come here if f < 1000 Hz
iorwf freq_ml,f ; if > 255 Hz?
BNZ p_conv_1 ; convert with 1 decimal digit
bcf DEC_1
movlw 62 ; limit to < 62 Hz
subwf freq_lo, w ; .. to examine utility frequencies 50 & 60 Hz
BC p_conv_2 ; skip if f >= 62 Hz
btfsc PUSH_BUTTON ; check the switch
goto p_conv_no_but
movlw MILLI_MASK
xorwf options, f ; .. if pressed toggle MILLI mode
movlw OPTION_MASK ; save only the options
andwf options, f
movlw options ; .. and store in EEPROM
movwf FSR
movlw EEPROM_ADR_OPTIONS ; load EEPROM-internal offset of "options"-byte
call EEPROM_WriteByte
p_conv_no_but:
btfss MILLI ; check if MILLI mode
goto p_conv_2 ; .. not set: goto normal 2 decimal mode
bsf DEC_3 ; set mode bit
p_conv_3:
; calculate frequency with 3 decimal digits
MOVLx32 PER2FREQ3, freq2 ; conversion for resolution 1 mHz
goto p_conv_end
p_conv_2:
; calculate frequency with 2 decimals digits
bcf DEC_3 ; exit very low mode
MOVLx32 PER2FREQ2, freq2 ; conversion for resolution 10 mHz
goto p_conv_end
p_conv_1:
; calculate frequency with 1 decimals digit
bcf DEC_3 ; exit very low mode
bsf DEC_1 ; set medium low mode
MOVLx32 PER2FREQ1, freq2 ; conversion for resolution 100 mHz
p_conv_end:
clrf freq_hi ; we re-use the frequency buffer for the 32-bit result
clrf freq_mh ; .. but need to clear it first
clrf freq_ml
clrf freq_lo
p_mul: ; freq := pcnt * freq2 (8bit * 32bit -> 32bit)
ADDx32 freq2, freq ; freq = freq + freq2
decf pcnt, f
btfss STATUS, Z
goto p_mul
; p_mul end
; TheHWcave:
; This section divides the adjusted conversion factor "freq" by the
; sum of the periods "period". This is a 32-bit divided by 16-bit
; operation using repeated 32-bit subtraction. The result is
; a 24-bit number "freq" which is the desired frequency (in millihertz).
;
; This calculation takes so much time that the watchdog timer
; would trigger and because the display multiplexing is stopped
; the last digit would be extremly bright and destroy the display
; I tried turning the display off, which works but causes a very
; irritating blinking display. So .. there is no choice, we have
; to keep multiplexing the display during the division which
; makes the calculation even slower..
clrf freq2_hi
clrf freq2_mh
movf period_hi, w
movwf freq2_ml
movf period_lo, w
movwf freq2_lo
clrf pdiv_mh
clrf pdiv_ml
clrf pdiv_lo
p_div:
call RefreshDisplay
SUBx32 freq2, freq ; freq = freq - freq2
btfss STATUS, C ;
goto p_div_end ; C = 0 -> ready
incf pdiv_lo, f ; incx24
btfsc STATUS, Z
incf pdiv_ml, f
btfsc STATUS, Z
incf pdiv_mh, f
goto p_div
p_div_end:
clrf freq_hi ; copy the result back into the freq_xx variable