add wrapped PCIe for sunxi

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Icenowy · Mar 30, 2020 · 86f6fef · 86f6fef · plaes · Apr 2, 2020
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commit 86f6fef
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diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
@@ -61,6 +61,16 @@
 		enable-active-high;
 	};
 
+	reg_pcie_slot: pcie-slot-power {
+		compatible = "regulator-fixed";
+		regulator-name = "pcie-slot-3v3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		startup-delay-us = <100000>;
+		gpio = <&pio 2 15 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
+
 	reg_usb_vbus: vbus {
 		compatible = "regulator-fixed";
 		regulator-name = "usb-vbus";
@@ -141,6 +151,14 @@
 	status = "okay";
 };
 
+&pcie {
+	vcc-supply = <&reg_bldo2>;
+	vdd-supply = <&reg_dcdcd>;
+	slot-supply = <&reg_pcie_slot>;
+	perst-gpio = <&pio 6 14 GPIO_ACTIVE_LOW>; /* PG14 */
+	status = "okay";
+};
+
 &pio {
 	vcc-pc-supply = <&reg_bldo2>;
 	vcc-pd-supply = <&reg_cldo1>;

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -11,6 +11,8 @@
 #include <dt-bindings/reset/sun8i-de2.h>
 #include <dt-bindings/thermal/thermal.h>
 
+/memreserve/ 0x40010000 0x00070000;
+
 / {
 	interrupt-parent = <&gic>;
 	#address-cells = <1>;
@@ -653,6 +655,35 @@
 			status = "disabled";
 		};
 
+		pcie: pcie@5400000 {
+			#address-cells = <3>;
+			#size-cells = <2>;
+			compatible = "pine64,allwinner-h6-pcie-wrapped";
+			reg = <0x05400000 0x4000>,
+			      <0x05410000 0x10000>;
+			reg-names = "dbi", "config";
+			device_type = "pci";
+			bus-range = <0x00 0xff>;
+			ranges = <0x81000000 0 0          0x05e00000 0 0x00010000 /* downstream I/O */
+				  0x82000000 0 0x05500000 0x05500000 0 0x00800000>; /* non-prefetchable memory */
+			num-lanes = <1>;
+			max-link-speed = <2>;
+			interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "msi", "linkup";
+			clocks = <&ccu CLK_PCIE_REF_OUT>,
+				 <&ccu CLK_PCIE_MAXI>,
+				 <&ccu CLK_PCIE_AUX>,
+				 <&ccu CLK_BUS_PCIE>;
+			clock-names = "ref", "axi", "aux", "bus";
+			resets = <&ccu RST_PCIE_POWERUP>, <&ccu RST_BUS_PCIE>;
+			reset-names = "power", "bus";
+			#interrupt-cells = <1>;
+			interrupt-map-mask = <0 0 0 0>;
+			interrupt-map = <0 0 0 1 &gic GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+		};
+
 		hdmi: hdmi@6000000 {
 			compatible = "allwinner,sun50i-h6-dw-hdmi";
 			reg = <0x06000000 0x10000>;

diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig
@@ -247,6 +247,14 @@ config PCI_MESON
 	  and therefore the driver re-uses the DesignWare core functions to
 	  implement the driver.
 
+config PCIE_SUNXI_WRAPPED
+	bool "Wrapped Allwinner SoCs PCIe controllers"
+	depends on PCI_MSI_IRQ_DOMAIN
+	select PCIE_DW_HOST
+	help
+	  Say Y here it you want PCIe controller support on Allwinner H6, wrapped
+	  to a regular PCIe controller by a hypervisor.
+
 config PCIE_TEGRA194
 	tristate "NVIDIA Tegra194 (and later) PCIe controller"
 	depends on ARCH_TEGRA_194_SOC || COMPILE_TEST

diff --git a/drivers/pci/controller/dwc/Makefile b/drivers/pci/controller/dwc/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_PCIE_KIRIN) += pcie-kirin.o
 obj-$(CONFIG_PCIE_HISI_STB) += pcie-histb.o
 obj-$(CONFIG_PCI_MESON) += pci-meson.o
 obj-$(CONFIG_PCIE_TEGRA194) += pcie-tegra194.o
+obj-$(CONFIG_PCIE_SUNXI_WRAPPED) += pcie-sunxi-wrapped.o
 obj-$(CONFIG_PCIE_UNIPHIER) += pcie-uniphier.o
 
 # The following drivers are for devices that use the generic ACPI