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BroadwellDEFspBinPkg MR2 locks IA32_FEATURE_CONTROL in FSP-M #10
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that should never be locked by anything but the kernel. Anything else is a mistake. We went through this seven years ago on chromebooks, I can't believe we're back here. |
@nate-desimone Any update on this issue ? |
The issue will be investigated, you may contact your Intel rep or file an IPS (Intel Premier Support) ticket if it’s urgent for you. Thanks! |
It's been a month without a reply. Any update on this issue ? |
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It's been a month without a reply. Any update on this issue ? |
At this point it's been a months. I'm +1-ning for update on that. |
It's been a month without a reply. Any update on this issue ? |
1 similar comment
It's been a month without a reply. Any update on this issue ? |
Almost a year! You must be typing very slow as it's only one line of source code to change... |
Root cause : after memory initialization the FSP programs "IA32_FEATURE_CONTROL" MSR with Vmx features and lock the register by setting 0th bit; once the lock bit set the register become read only. Proposed solution : do not lock the register after memory init instead lock the register during FSP ready to boot stage . This will be resolved in the next official release however the timeline of next release is still tbc. |
@swong23 any update on this (next month this will be 3 years old) |
The IA32_FEATURE_CONTROL MSR is locked on all cores after memory init, but it should be locked in FspNotify(EnumInitPhaseReadyToBoot).
That would allow coreboot to set sane values, instead of the FSP default of 0x4.
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