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RISCV basic support #1318

Merged
merged 15 commits into from
Jul 25, 2024
Merged

RISCV basic support #1318

merged 15 commits into from
Jul 25, 2024

Commits on Jul 16, 2024

  1. RISCV basic support

    @Antwy
    Antwy committed Jul 16, 2024
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  2. Fix riscv semantics

    @Antwy
    Antwy committed Jul 16, 2024
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  3. Add python bindings & binary emulation test for riscv 64/32

    @Antwy
    Antwy committed Jul 16, 2024
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  4. Fix RV64 bitsize of reg-reg shift semantics (sll/sra/srl)

    @Antwy
    Antwy committed Jul 16, 2024
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  5. Fix division operations corner cases semantics

    @Antwy
    Antwy committed Jul 16, 2024
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  6. Fix vcpkg CI

    @Antwy
    Antwy committed Jul 16, 2024
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  7. Fix word extracting shifts

    @Antwy
    Antwy committed Jul 16, 2024
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  8. Fix immutable register assignments

    @Antwy
    Antwy committed Jul 16, 2024
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  9. Fix compressed shift immediate bits

    @Antwy
    Antwy committed Jul 16, 2024
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  10. Revert AppVeyor to Capstone 4.0.2

    @Antwy
    Antwy committed Jul 16, 2024
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Commits on Jul 18, 2024

  1. Use riscv only with Capstone version 5+

    @Antwy
    Antwy committed Jul 18, 2024
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Commits on Jul 22, 2024

  1. Fix issues

    @Antwy
    Antwy committed Jul 22, 2024
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  2. Fix more issues on riscv

    @Antwy
    Antwy committed Jul 22, 2024
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Commits on Jul 23, 2024

  1. Fix cmake

    @Antwy
    Antwy committed Jul 23, 2024
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Commits on Jul 24, 2024

  1. Uncomment mrs/msr aarch64 capstone version depending test

    @Antwy
    Antwy committed Jul 24, 2024
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