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fix z80 indexing in hardwritten assembly (#137)
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KarolS committed Jan 27, 2023
1 parent 24de2f7 commit ee47cce
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Showing 2 changed files with 12 additions and 12 deletions.
Original file line number Diff line number Diff line change
Expand Up @@ -241,7 +241,7 @@ object Z80StatementCompiler extends AbstractStatementCompiler[ZLine] {
}
}
val registers = (reg, offset) match {
case (OneRegister(r), Some(o)) => env.evalForAsm(expression) match {
case (OneRegister(r), Some(o)) => env.evalForAsm(o) match {
case Some(NumericConstant(v, _)) => OneRegisterOffset(r, v.toInt)
case Some(_) =>
ctx.log.error("Non-numeric constant", o.position)
Expand All @@ -250,7 +250,7 @@ object Z80StatementCompiler extends AbstractStatementCompiler[ZLine] {
ctx.log.error("Inlining failed due to non-constant things", o.position)
reg
}
case (TwoRegisters(t, s), Some(o)) => env.evalForAsm(expression) match {
case (TwoRegisters(t, s), Some(o)) => env.evalForAsm(o) match {
case Some(NumericConstant(v, _)) => TwoRegistersOffset(t, s, v.toInt)
case Some(_) =>
ctx.log.error("Non-numeric constant", o.position)
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20 changes: 10 additions & 10 deletions src/test/scala/millfork/test/Z80AssemblySuite.scala
Original file line number Diff line number Diff line change
Expand Up @@ -728,9 +728,9 @@ class Z80AssemblySuite extends FunSuite with Matchers {
"""
| asm void main () {
| ret
| add a,ix(0)
| adc a,ix(0)
| sub ix(0)
| add a,ix(1)
| adc a,ix(2)
| sub ix(3)
| sbc a,ix(0)
| and ix(0)
| xor ix(0)
Expand Down Expand Up @@ -760,8 +760,8 @@ class Z80AssemblySuite extends FunSuite with Matchers {
| ex (sp),ix
| jp (ix)
| ld sp,ix
| ld a,ix(0)
| ld ix(0),a
| ld a,ix(2)
| ld ix(2),a
|
| ret
| }
Expand All @@ -773,9 +773,9 @@ class Z80AssemblySuite extends FunSuite with Matchers {
"""
| asm void main () {
| ret
| add a,iy(0)
| adc a,iy(0)
| sub iy(0)
| add a,iy(1)
| adc a,iy(2)
| sub iy(3)
| sbc a,iy(0)
| and iy(0)
| xor iy(0)
Expand Down Expand Up @@ -805,8 +805,8 @@ class Z80AssemblySuite extends FunSuite with Matchers {
| ex (sp),iy
| jp (iy)
| ld sp,iy
| ld a,iy(0)
| ld iy(0),a
| ld a,iy(2)
| ld iy(2),a
|
| ret
| }
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