Transferred Intel symbols

KiCad · Jan 6, 2018 · 7b81ac4 · 7b81ac4
1 parent 8fd538c
commit 7b81ac4
Show file tree

Hide file tree

Showing 10 changed files with 1,311 additions and 0 deletions.
diff --git a/Driver_Display.dcm b/Driver_Display.dcm
@@ -1,5 +1,10 @@
 EESchema-DOCLIB  Version 2.0
 #
+$CMP 82720
+D Graphics Display Controller, PDIP-40
+K Graphics Controller
+$ENDCMP
+#
 $CMP ADS7843E
 D Single-supply, 12bit, 4 ch, touch screen driver, 2.2 - 5.25 VDD, -40 to +85 C, QSPI, SPI, 3-wire serial interface, SSOP-16
 K Single-supply, 12bit, 4 ch, touch screen driver, 2.2 - 5.25 VDD, -40 to +85 C, QSPI, SPI, 3-wire serial interface, SSOP-16

diff --git a/Driver_Display.lib b/Driver_Display.lib
@@ -1,6 +1,62 @@
 EESchema-LIBRARY Version 2.3
 #encoding utf-8
 #
+# 82720
+#
+DEF 82720 U 0 40 Y Y 1 F N
+F0 "U" -750 1300 50 H V L CNN
+F1 "82720" 500 1300 50 H V L CNN
+F2 "DIP-40" 0 0 50 H I C CIN
+F3 "" 0 -100 50 H I C CNN
+$FPLIST
+ PDIP*
+ DIP*
+$ENDFPLIST
+DRAW
+S -750 -1250 750 1250 0 0 10 f
+X 2xWCLK 1 -900 1100 150 R 50 50 1 1 I
+X ~DBIN 2 -900 1000 150 R 50 50 1 1 I I
+X HSYNC 3 -900 800 150 R 50 50 1 1 O
+X VSYNC 4 -900 700 150 R 50 50 1 1 B
+X BLANK 5 -900 500 150 R 50 50 1 1 O
+X (ALE)~RAS~ 6 900 800 150 L 50 50 1 1 O I
+X DREQ 7 -900 200 150 R 50 50 1 1 O
+X ~DACK~ 8 -900 100 150 R 50 50 1 1 I I
+X ~RD~ 9 -900 0 150 R 50 50 1 1 I I
+X ~WR~ 10 -900 -100 150 R 50 50 1 1 I I
+X GND 20 0 -1400 150 U 50 50 1 1 W
+X AD8 30 900 -300 150 L 50 50 1 1 B
+X VCC 40 0 1400 150 D 50 50 1 1 W
+X A0 11 -900 -200 150 R 50 50 1 1 I
+X LPEN 21 900 1100 150 L 50 50 1 1 I
+X AD9 31 900 -200 150 L 50 50 1 1 B
+X DB0 12 -900 -400 150 R 50 50 1 1 B
+X AD0 22 900 -1100 150 L 50 50 1 1 B
+X AD10 32 900 -100 150 L 50 50 1 1 B
+X DB1 13 -900 -500 150 R 50 50 1 1 B
+X AD1 23 900 -1000 150 L 50 50 1 1 B
+X AD14 33 900 0 150 L 50 50 1 1 B
+X DB2 14 -900 -600 150 R 50 50 1 1 B
+X AD2 24 900 -900 150 L 50 50 1 1 B
+X AD12 34 900 100 150 L 50 50 1 1 B
+X DB3 15 -900 -700 150 R 50 50 1 1 B
+X AD3 25 900 -800 150 L 50 50 1 1 B
+X AD13 35 900 200 150 L 50 50 1 1 B
+X DB4 16 -900 -800 150 R 50 50 1 1 B
+X AD4 26 900 -700 150 L 50 50 1 1 B
+X AD14 36 900 300 150 L 50 50 1 1 B
+X DB5 17 -900 -900 150 R 50 50 1 1 B
+X AD5 27 900 -600 150 L 50 50 1 1 B
+X AD15 37 900 400 150 L 50 50 1 1 B
+X DB6 18 -900 -1000 150 R 50 50 1 1 B
+X AD6 28 900 -500 150 L 50 50 1 1 B
+X A16 38 900 500 150 L 50 50 1 1 O
+X DB7 19 -900 -1100 150 R 50 50 1 1 B
+X AD7 29 900 -400 150 L 50 50 1 1 B
+X A17 39 900 600 150 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
 # ADS7843E
 #
 DEF ADS7843E U 0 40 Y Y 1 F N

diff --git a/Interface.dcm b/Interface.dcm
@@ -1,5 +1,29 @@
 EESchema-DOCLIB  Version 2.0
 #
+$CMP 8255
+D Programmable Peripheral Interface, PDIP-40
+K 8255 PPI
+F http://aturing.umcs.maine.edu/~meadow/courses/cos335/Intel8255A.pdf
+$ENDCMP
+#
+$CMP 8255A
+D Programmable Peripheral Interface, PDIP-40
+K 8255 PPI
+F http://aturing.umcs.maine.edu/~meadow/courses/cos335/Intel8255A.pdf
+$ENDCMP
+#
+$CMP 82C55A
+D CHMOS Programmable Peripheral Interface, PDIP-40
+K 8255 PPI
+F http://jap.hu/electronic/8255.pdf
+$ENDCMP
+#
+$CMP 82C55A_PLCC
+D CHMOS Programmable Peripheral Interface, PLCC-44
+K 8255 PPI
+F http://jap.hu/electronic/8255.pdf
+$ENDCMP
+#
 $CMP AD9834
 D 10 bit 75 MHz Complete Direct Digital Synthesizer, 2.3 V to 5.5 V, 20 mW, TSSOP-20
 K Direct Digital Synthesizer DDS

diff --git a/Interface.lib b/Interface.lib
@@ -1,6 +1,122 @@
 EESchema-LIBRARY Version 2.3
 #encoding utf-8
 #
+# 8255
+#
+DEF 8255 U 0 40 Y Y 1 F N
+F0 "U" -550 1500 50 H V L CNN
+F1 "8255" 350 1500 50 H V L CNN
+F2 "Housings_DIP:DIP-40_W15.24mm" 0 300 50 H I C CNN
+F3 "" 0 300 50 H I C CNN
+ALIAS 8255A 82C55A
+$FPLIST
+ DIP*W15.24mm*
+ PDIP*W15.24mm*
+$ENDFPLIST
+DRAW
+S -550 -1450 550 1450 1 1 10 f
+X PA3 1 700 1000 150 L 50 50 1 1 B
+X PA2 2 700 1100 150 L 50 50 1 1 B
+X PA1 3 700 1200 150 L 50 50 1 1 B
+X PA0 4 700 1300 150 L 50 50 1 1 B
+X ~RD~ 5 -700 900 150 R 50 50 1 1 I
+X ~CS~ 6 -700 1000 150 R 50 50 1 1 I
+X GND 7 0 -1600 150 U 50 50 1 1 W
+X A1 8 -700 400 150 R 50 50 1 1 I
+X A0 9 -700 500 150 R 50 50 1 1 I
+X PC7 10 700 -1200 150 L 50 50 1 1 B
+X PB2 20 700 200 150 L 50 50 1 1 B
+X D4 30 -700 -300 150 R 50 50 1 1 B
+X PA4 40 700 900 150 L 50 50 1 1 B
+X PC6 11 700 -1100 150 L 50 50 1 1 B
+X PB3 21 700 100 150 L 50 50 1 1 B
+X D3 31 -700 -200 150 R 50 50 1 1 B
+X PC5 12 700 -1000 150 L 50 50 1 1 B
+X PB4 22 700 0 150 L 50 50 1 1 B
+X D2 32 -700 -100 150 R 50 50 1 1 B
+X PC4 13 700 -900 150 L 50 50 1 1 B
+X PB5 23 700 -100 150 L 50 50 1 1 B
+X D1 33 -700 0 150 R 50 50 1 1 B
+X PC0 14 700 -500 150 L 50 50 1 1 B
+X PB6 24 700 -200 150 L 50 50 1 1 B
+X D0 34 -700 100 150 R 50 50 1 1 B
+X PC1 15 700 -600 150 L 50 50 1 1 B
+X PB7 25 700 -300 150 L 50 50 1 1 B
+X RESET 35 -700 1300 150 R 50 50 1 1 I
+X PC2 16 700 -700 150 L 50 50 1 1 B
+X VCC 26 0 1600 150 D 50 50 1 1 W
+X ~WR~ 36 -700 800 150 R 50 50 1 1 I
+X PC3 17 700 -800 150 L 50 50 1 1 B
+X D7 27 -700 -600 150 R 50 50 1 1 B
+X PA7 37 700 600 150 L 50 50 1 1 B
+X PB0 18 700 400 150 L 50 50 1 1 B
+X D6 28 -700 -500 150 R 50 50 1 1 B
+X PA6 38 700 700 150 L 50 50 1 1 B
+X PB1 19 700 300 150 L 50 50 1 1 B
+X D5 29 -700 -400 150 R 50 50 1 1 B
+X PA5 39 700 800 150 L 50 50 1 1 B
+ENDDRAW
+ENDDEF
+#
+# 82C55A_PLCC
+#
+DEF 82C55A_PLCC U 0 40 Y Y 1 F N
+F0 "U" -550 1500 50 H V L CNN
+F1 "82C55A_PLCC" 350 1500 50 H V L CNN
+F2 "Sockets:PLCC44" 0 300 50 H I C CNN
+F3 "" 0 300 50 H I C CNN
+$FPLIST
+ *PLCC?44*
+$ENDFPLIST
+DRAW
+S -550 -1450 550 1450 1 1 10 f
+X NC 1 -700 -900 200 R 50 50 1 1 N N
+X PA3 2 700 1000 150 L 50 50 1 1 B
+X PA2 3 700 1100 150 L 50 50 1 1 B
+X PA1 4 700 1200 150 L 50 50 1 1 B
+X PA0 5 700 1300 150 L 50 50 1 1 B
+X ~RD~ 6 -700 900 150 R 50 50 1 1 I
+X ~CS~ 7 -700 1000 150 R 50 50 1 1 I
+X GND 8 0 -1600 150 U 50 50 1 1 W
+X A1 9 -700 400 150 R 50 50 1 1 I
+X A0 10 -700 500 150 R 50 50 1 1 I
+X PB0 20 700 400 150 L 50 50 1 1 B
+X D7 30 -700 -600 150 R 50 50 1 1 B
+X ~WR~ 40 -700 800 150 R 50 50 1 1 I
+X PC7 11 700 -1200 150 L 50 50 1 1 B
+X PB1 21 700 300 150 L 50 50 1 1 B
+X D6 31 -700 -500 150 R 50 50 1 1 B
+X PA7 41 700 600 150 L 50 50 1 1 B
+X NC 12 -700 -1000 200 R 50 50 1 1 N N
+X PB2 22 700 200 150 L 50 50 1 1 B
+X D5 32 -700 -400 150 R 50 50 1 1 B
+X PA6 42 700 700 150 L 50 50 1 1 B
+X PC6 13 700 -1100 150 L 50 50 1 1 B
+X NC 23 -700 -1100 200 R 50 50 1 1 N N
+X D4 33 -700 -300 150 R 50 50 1 1 B
+X PA5 43 700 800 150 L 50 50 1 1 B
+X PC5 14 700 -1000 150 L 50 50 1 1 B
+X PB3 24 700 100 150 L 50 50 1 1 B
+X NC 34 -700 -1200 200 R 50 50 1 1 N N
+X PA4 44 700 900 150 L 50 50 1 1 B
+X PC4 15 700 -900 150 L 50 50 1 1 B
+X PB4 25 700 0 150 L 50 50 1 1 B
+X D3 35 -700 -200 150 R 50 50 1 1 B
+X PC0 16 700 -500 150 L 50 50 1 1 B
+X PB5 26 700 -100 150 L 50 50 1 1 B
+X D2 36 -700 -100 150 R 50 50 1 1 B
+X PC1 17 700 -600 150 L 50 50 1 1 B
+X PB6 27 700 -200 150 L 50 50 1 1 B
+X D1 37 -700 0 150 R 50 50 1 1 B
+X PC2 18 700 -700 150 L 50 50 1 1 B
+X PB7 28 700 -300 150 L 50 50 1 1 B
+X D0 38 -700 100 150 R 50 50 1 1 B
+X PC3 19 700 -800 150 L 50 50 1 1 B
+X VCC 29 0 1600 150 D 50 50 1 1 W
+X RESET 39 -700 1300 150 R 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
 # AD9834
 #
 DEF AD9834 U 0 40 Y Y 1 F N

diff --git a/Interface_UART.dcm b/Interface_UART.dcm
@@ -1,5 +1,26 @@
 EESchema-DOCLIB  Version 2.0
 #
+$CMP 16450
+D PC16450, Universal Asynchronous Receiver/Transmitter, PDIP-40
+K 1ch UART
+$ENDCMP
+#
+$CMP 16550
+D PC16550D, Universal Asynchronous Receiver/Transmitter with FIFOs, PDIP-40
+K 1ch UART FIFO
+F http://www.ti.com/lit/ds/symlink/pc16550d.pdf
+$ENDCMP
+#
+$CMP 8250
+D PC8250A, Universal Asynchronous Receiver/Transmitter, PDIP-40
+K 1ch UART
+$ENDCMP
+#
+$CMP 8252
+D Universal Asynchronous Receiver/Transmitter, PDIP-28
+K UART Serial Interface
+$ENDCMP
+#
 $CMP ADM101E
 D Single RS232 driver/receiver, 5V supply, 460kb/s
 K rs232 uart transceiver line-driver