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add MSP430F2618-EP #927

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merged 6 commits into from Jan 12, 2019
Merged

add MSP430F2618-EP #927

merged 6 commits into from Jan 12, 2019

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penoud
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@penoud penoud commented Sep 12, 2018

add MSP430F2618-EP


Thanks for creating a pull request to contribute to the KiCad libraries! To speed up integration of your PR, please check the following items:

  • Provide a URL to a datasheet for the symbol(s) you are contributing
    http://www.ti.com/lit/ds/symlink/msp430f2618-ep.pdf
  • An example screenshot image is very helpful
    image
  • Ensure that the associated footprints match the official footprint library
  • If there are matching footprint PRs, provide link(s) as appropriate
  • Check the output of the Travis automated check scripts - fix any errors as required

@antoniovazquezblanco antoniovazquezblanco added Pending reviewer A pull request waiting for a reviewer Addition Adds new symbols to library labels Oct 5, 2018
@myfreescalewebpage myfreescalewebpage self-assigned this Jan 3, 2019
@myfreescalewebpage myfreescalewebpage removed the Pending reviewer A pull request waiting for a reviewer label Jan 3, 2019
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myfreescalewebpage commented Jan 3, 2019

Hi @penoud , thanks for contributing,

A few comments I have during my review:

  • Rename DVCC1 and DVCC2 to DVCC only
  • Rename DVSS1 and DVSS2 to DVSS only and stack them
  • Pin B3 is missing, you should add it, with name AVSS, and stack it with pin B2
  • Pins C2 and C3 are connected together inernally and should be stacked
  • RST pin is active low, the name of the pin B5 should be ~RST~/NMI to get the overbar
  • Pins A5 and A6 (TCK and TDI/TCLK) are Input, not Power Input
  • Pin B6 (TMS) is Input, not Bidirectional
  • Pin E2 (VREF+) is Power Input, not Bidirectional and should be placed on the top of the symbol
  • The name of pin G1 should be VREF-/VeREF-
  • Pin G1 (VREF-/VeREF-) is Power Input, not Bidirectional and should be placed on the bottom of the symbol
  • Pin E1 (XIN) is Input and pin F1 (XOUT) is Output
  • I would also suggest, as it is recommended by the datasheet page 7, that all reserved pins should be added, called DVSS, and stacked with the other DVSS pins
  • All pins on the right should have the name crossed, so Px.y is on the right, for example DAC1/A5/P6.5. You can have a look to the other MSP devices for examples.

Cheers,
Joel

@penoud
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penoud commented Jan 5, 2019

Updated screenshoot:
image

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myfreescalewebpage commented Jan 6, 2019

Thanks @penoud , few remaining comments:

  • P6.5 pins (C2 and C3) name not crossed
  • Pin E2 (VREF+) should be placed on the top of the symbol
  • Pin G1 (VREF-/VeREF-) should be placed on the bottom of the symbol
  • For consistency between top and bottom of the symbol, you can cross the position of the DVSS and AVSS pins (Digital on the left, analog on the right)

Joel

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penoud commented Jan 6, 2019

updated symbol:
image

@myfreescalewebpage
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For the same logic, VREF+ to be moved to the right of AVCC.

Also just realized that following stacking of P6.5, the ports on the left are no more aligned with the ports on the right. Maybe moving ports on the left up of 100mil is great. Proposition below.

capture

Let me known.

Joel

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penoud commented Jan 7, 2019

Looks fine for me. Did I need to do something?

@myfreescalewebpage
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Yes please, I have only attached a screenshot to illustrate the modification suggested to you, I haven't made any modifications of the previous message :)

Joel

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penoud commented Jan 11, 2019

Updated pin placement screenshoot:
image

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@penoud ok for me, no more comment. Merging.
Thanks for your work on this PR !
Joel

@myfreescalewebpage myfreescalewebpage merged commit bac4ec0 into KiCad:master Jan 12, 2019
@penoud penoud deleted the MSP430 branch January 12, 2019 16:19
@antoniovazquezblanco antoniovazquezblanco added this to the 5.1.0 milestone Jan 12, 2019
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3 participants