Add support for IT87952E EC on Gigabyte boards #1091
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IT8795E and IT87952E are distinct chips (with their own IC markings). The IT8795E, as the IT8791E and IT8792E, reports chip ID 0x8733 whereas the IT87952E identifies as 0x8695.
When the AMD LPC Bridge registers are restored after configuring memory mapping, restore the correct value for the "Memory Address for LPC target cycles" register.
IT87952E (ID 0x8695) has a third byte in SuperIO config space (LDN 0x0F) that determines more bits of the host address for LPC memory mapping. Also the base address for Gigabyte boards is 0xFC000000 instead of 0xFF000000 (as is the case with IT8790/1/2/5). This should make additional fan controls work on Gigabyte mainboards where the settings had no effect previously, e.g: X570S AORUS MASTER and X670E AORUS MASTER. (cf. Issue LibreHardwareMonitor#251) It does not yet work for Intel boards as the LPC bridge requires different programming.
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Is this done now @mrehkopf? |
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For what it's supposed to do, it's done. ;) In conjunction with @javs's work to memory-map the EC RAM and disable the custom Gigabyte firmware control, I can now control FAN4, FAN5_PUMP and FAN6_PUMP on my X570S AORUS MASTER. So far it should work with all Gigabyte AMD boards that use an IT87952E for their secondary EC and have it exposed on the LPC bus for "traditional" direct ITE register manipulation (the way it works with all ITE chips so far). The pull request basically provides a missing piece for @javs's AMD LPC bridge code so the Gigabyte firmware mode can be disabled and the ITE registers may be programmed in the traditional way. My initial description was wrong though - X670E AORUS MASTER doesn't seem to expose the 2nd EC via the usual LPC interface anymore. Something else does show up at ports 4e/4f but it would require further investigation. (It should be noted that Gigabyte seems to be shifting away from the old LPC interface; in order to fully support current and future boards it may become necessary to add support in LHM for programming the EC memory regions directly. They are processed by their custom firmware running on the ECs, instead of the traditional interface. Even my X570S board has two fan headers that are unreachable via the ITE interface.) |
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I am planning to add support for the X570S AORUS MASTER specifically (in terms of named sensors and controls) - I've been holding it back because it depends on the renamed Chip.IT87952E constant. Would you prefer this in a separate pull request or should I push it here? |
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A separate PR is fine, thanks 😁 |
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Whoops. Not sure what happened here. 😅 A BOM perhaps?
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Probably, but it was already present. I noticed this character on GitHub and changed it back :).
IT87952E (ID 0x8695) has a third byte in SuperIO config space
(LDN 0x0F) that determines more bits of the host address for LPC memory
mapping.
Also the base address for this controller is 0xFC000000 instead of
0xFF000000 (as is the case with IT8790/1/2/5).
This should make additional fan controls work on Gigabyte mainboards
where the settings had no effect previously, e.g. X570S AORUS MASTER
and X670E AORUS MASTER. (cf. Issue #251)It does not yet work for Intel boards as the LPC bridge requires
different programming.
A typo is corrected in the AmdEnable code where the original LPC bridge
register values are restored after operation.
Constant Chip.IT8795E is renamed to Chip.IT87952E.