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[M680x0] Base Patch 2: Changes in the target-independent CodeGen part
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 - Allow register to be PCREL
 - Allow target implementation to override register spilling function
 - Add new function to search DebugLoc in a reverse ordering
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mshockwave committed Sep 7, 2020
1 parent 5b7d0ef commit 70a6bae
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Showing 4 changed files with 25 additions and 4 deletions.
8 changes: 8 additions & 0 deletions llvm/include/llvm/CodeGen/MachineBasicBlock.h
Expand Up @@ -837,13 +837,21 @@ class MachineBasicBlock
DebugLoc findDebugLoc(iterator MBBI) {
return findDebugLoc(MBBI.getInstrIterator());
}
DebugLoc rfindDebugLoc(reverse_instr_iterator MBBI);
DebugLoc rfindDebugLoc(reverse_iterator MBBI) {
return rfindDebugLoc(MBBI.getInstrIterator());
}

/// Find the previous valid DebugLoc preceding MBBI, skipping and DBG_VALUE
/// instructions. Return UnknownLoc if there is none.
DebugLoc findPrevDebugLoc(instr_iterator MBBI);
DebugLoc findPrevDebugLoc(iterator MBBI) {
return findPrevDebugLoc(MBBI.getInstrIterator());
}
DebugLoc rfindPrevDebugLoc(reverse_instr_iterator MBBI);
DebugLoc rfindPrevDebugLoc(reverse_iterator MBBI) {
return rfindPrevDebugLoc(MBBI.getInstrIterator());
}

/// Find and return the merged DebugLoc of the branch instructions of the
/// block. Return UnknownLoc if there is none.
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4 changes: 2 additions & 2 deletions llvm/include/llvm/CodeGen/TargetRegisterInfo.h
Expand Up @@ -275,13 +275,13 @@ class TargetRegisterInfo : public MCRegisterInfo {

/// Return the size in bytes of the stack slot allocated to hold a spilled
/// copy of a register from class RC.
unsigned getSpillSize(const TargetRegisterClass &RC) const {
virtual unsigned getSpillSize(const TargetRegisterClass &RC) const {
return getRegClassInfo(RC).SpillSize / 8;
}

/// Return the minimum required alignment in bytes for a spill slot for
/// a register of this class.
unsigned getSpillAlignment(const TargetRegisterClass &RC) const {
virtual unsigned getSpillAlignment(const TargetRegisterClass &RC) const {
return getRegClassInfo(RC).SpillAlignment / 8;
}

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14 changes: 14 additions & 0 deletions llvm/lib/CodeGen/MachineBasicBlock.cpp
Expand Up @@ -1335,6 +1335,13 @@ MachineBasicBlock::findDebugLoc(instr_iterator MBBI) {
return MBBI->getDebugLoc();
return {};
}
DebugLoc
MachineBasicBlock::rfindDebugLoc(reverse_instr_iterator MBBI) {
// Skip debug declarations, we don't want a DebugLoc from them.
MBBI = skipDebugInstructionsBackward(MBBI, instr_rbegin());
if (!MBBI->isDebugInstr()) return MBBI->getDebugLoc();
return {};
}

/// Find the previous valid DebugLoc preceding MBBI, skipping and DBG_VALUE
/// instructions. Return UnknownLoc if there is none.
Expand All @@ -1345,6 +1352,13 @@ DebugLoc MachineBasicBlock::findPrevDebugLoc(instr_iterator MBBI) {
if (!MBBI->isDebugInstr()) return MBBI->getDebugLoc();
return {};
}
DebugLoc MachineBasicBlock::rfindPrevDebugLoc(reverse_instr_iterator MBBI) {
// Skip debug declarations, we don't want a DebugLoc from them.
MBBI = skipDebugInstructionsForward(std::prev(MBBI), instr_rend());
if (MBBI != instr_rend())
return MBBI->getDebugLoc();
return {};
}

/// Find and return the merged DebugLoc of the branch instructions of the block.
/// Return UnknownLoc if there is none.
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3 changes: 1 addition & 2 deletions llvm/lib/CodeGen/MachineVerifier.cpp
Expand Up @@ -1645,8 +1645,7 @@ MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum) {
if (MCOI.OperandType == MCOI::OPERAND_REGISTER &&
!MO->isReg() && !MO->isFI())
report("Expected a register operand.", MO, MONum);
if ((MCOI.OperandType == MCOI::OPERAND_IMMEDIATE ||
MCOI.OperandType == MCOI::OPERAND_PCREL) && MO->isReg())
if (MCOI.OperandType == MCOI::OPERAND_IMMEDIATE && MO->isReg())
report("Expected a non-register operand.", MO, MONum);
}

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