GitHub - MParygin/v.specialistm: Verilog emulation "Specialist M" computer (USSR)

#v.specialistm

Verilog computer "Specialist M" on Digilent Atlys board.

Video out to HDMI 1920 * 1080 * 60.

Keboard events & upload memory by fpgalink. Hardware button - RST (initial start).

COE file for memory (BIOS at 0xC000) BIT file is complete bitstream for Digilent Atlys board.

Name		Name	Last commit message	Last commit date
Latest commit History 4 Commits
DRAM16XN.v		DRAM16XN.v
README.md		README.md
blk_mem.mif		blk_mem.mif
blk_mem.v		blk_mem.v
blk_mem_color.v		blk_mem_color.v
comm_fpga_fx2.v		comm_fpga_fx2.v
convert_30to15_fifo.v		convert_30to15_fifo.v
dcm.v		dcm.v
dvi_encoder.v		dvi_encoder.v
dvi_out.v		dvi_out.v
encode.v		encode.v
fifo_generator_v9_3_0.v		fifo_generator_v9_3_0.v
io.v		io.v
main.bit		main.bit
main.ucf		main.ucf
main.v		main.v
sample.jpg		sample.jpg
selector.v		selector.v
serdes_n_to_1.v		serdes_n_to_1.v
startup.coe		startup.coe
vga.v		vga.v
vga1920x1080x60.v		vga1920x1080x60.v
video.v		video.v
vm80a.v		vm80a.v

MParygin/v.specialistm