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Implementation of Electronic Designs using VHDL a Hardware Descriptive Language

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Name		Name	Last commit message	Last commit date
Latest commit History 9 Commits
.gitattributes		.gitattributes
README.md		README.md
Smart_comb_lock.vhd		Smart_comb_lock.vhd
Smart_comb_lock_constraint.xdc		Smart_comb_lock_constraint.xdc
Smart_comb_lock_tvb.vhd		Smart_comb_lock_tvb.vhd

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Implementation of Electronic Designs using VHDL a Hardware Descriptive Language on Nexys 4DDR

Smart Combination Lock using VHDL and Nexys 4 DDR

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Implementation of Electronic Designs using VHDL a Hardware Descriptive Language

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VHDL 100.0%