A VHDL project to monitor if data is being transmitted on a serial bus, and in which direction.
See src/example.vhd for how to use the src/serial_monitor.vhd.
The only tests performed are those included.
Written in 2022 by Manzoni Giuseppe
To the extent possible under law, the author(s) have dedicated all copyright and related and neighboring rights to this software to the public domain worldwide.
This software is distributed without any warranty.
You should have received a copy of the CC0 Public Domain Dedication along with this software. If not, see http://creativecommons.org/publicdomain/zero/1.0/.