Skip to content
CI Build

[slang] Introduce clock resolution support (SystemVerilog LRM 16.13/16.16 sections). #1851

Sign in to view logs

[slang] Introduce clock resolution support (SystemVerilog LRM 16.13/16.16 sections).

[slang] Introduce clock resolution support (SystemVerilog LRM 16.13/16.16 sections). #1851

Triggered via pull request June 11, 2024 22:07
@likeamahoneylikeamahoney
synchronize #1027
likeamahoney:feature/clock-resolution
Status Failure
Total duration 36m 26s
Artifacts –

build.yml

on: pull_request
linux-coverage
13m 41s
linux-coverage
conan
7m 41s
conan
Matrix: build
Fit to window
Zoom out
Zoom in

Annotations

2 errors
build (win64-debug-noexcept, windows-latest)
Process completed with exit code 1.
build (win64-debug-shared, windows-latest)
Process completed with exit code 1.