LAB4

Cache_size	log(cache_size)	Cache_bit	Block_size	offset_bit	tag_bit
4k	12	8	16	4	20
4k	12	7	32	5	20
4k	12	6	64	6	20
4k	12	5	128	7	20
4k	12	4	256	8	20
16k	14	10	16	4	18
16k	14	9	32	5	18
16k	14	8	64	6	18
16k	14	7	128	7	18
16k	14	6	256	8	18
64k	16	12	16	4	16
64k	16	11	32	5	16
64k	16	10	64	6	16
64k	16	9	128	7	16
64k	16	8	256	8	16
256k	18	14	16	4	14
256k	18	13	32	5	14
256k	18	12	64	6	14
256k	18	11	128	7	14
256k	18	10	256	8	14

Cache_size	Block_size	Cache_block	way	set_size	set bit	offset bit
4k(2^12)	64(Bytes)	2^6	1	2^6	6	6
4k	64(Bytes)	2^6	2	2^5	5	6
4k	64(Bytes)	2^6	4	2^4	4	6
4k	64(Bytes)	2^6	8	2^3	3	6
	64(Bytes)					6

Name		Name	Last commit message	Last commit date
Latest commit History 15 Commits
.vscode		.vscode
.gitignore		.gitignore
0711282_0716077.pdf		0711282_0716077.pdf
ALU.v		ALU.v
ALU_Ctrl.v		ALU_Ctrl.v
Adder.v		Adder.v
Branch_type.v		Branch_type.v
CPU.v		CPU.v
DCACHE.txt		DCACHE.txt
Data_Memory.v		Data_Memory.v
Decoder.v		Decoder.v
ICACHE.txt		ICACHE.txt
Instruction_Memory.v		Instruction_Memory.v
LU.txt		LU.txt
MUX_2to1.v		MUX_2to1.v
ProgramCounter.v		ProgramCounter.v
RADIX.txt		RADIX.txt
README.md		README.md
Reg_File.v		Reg_File.v
Shift_Left_Two_32.v		Shift_Left_Two_32.v
Sign_Extend.v		Sign_Extend.v
TestBench.v		TestBench.v
a.cpp		a.cpp
a.out		a.out
answer.txt		answer.txt
bin.cpp		bin.cpp
bin.txt		bin.txt
bin2.cpp		bin2.cpp
bin2.txt		bin2.txt
bin3.cpp		bin3.cpp
bin3.txt		bin3.txt
catch.out		catch.out
catch_lru.out		catch_lru.out
chart.ods		chart.ods
cnt.cpp		cnt.cpp
dec.cpp		dec.cpp
dec.txt		dec.txt
direct_mapped_cache.cpp		direct_mapped_cache.cpp
direct_mapped_cache_lru.cpp		direct_mapped_cache_lru.cpp
lab4_test_data.txt		lab4_test_data.txt
lab4_test_data_assembly.pdf		lab4_test_data_assembly.pdf
makefile		makefile
output.txclear		output.txclear
output.txt		output.txt
samcpu.vvp		samcpu.vvp
simulat.cpp		simulat.cpp
test.cpp		test.cpp
test.vvp		test.vvp
tmp.cpp		tmp.cpp
tmp.txt		tmp.txt
tmp1.txt		tmp1.txt
tmp2.txt		tmp2.txt

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