Worked on riscv32/64 syscalls.

arch/riscv/src/include/asm/mod.rs

@@ -3,6 +3,8 @@ global_asm!(include_str!("risc.S"));
 #[cfg(target_arch = "riscv64")]
 global_asm!(include_str!("trap.S"));
 
+pub mod syscall;
+
 extern "C" {
     fn wait_for_interrupt() -> !;
 }

arch/riscv/src/include/asm/syscall.rs

@@ -0,0 +1,9 @@
+use crate::kernel::syscalls::*;
+
+#[no_mangle]
+pub unsafe extern "C" fn syscall(sys_num: i32, sys_arg: u8) {
+    match sys_num {
+        64 => sys_write(sys_arg),
+        _ => return,
+    }
+}

arch/riscv/src/kernel/device.rs

@@ -18,4 +18,6 @@ pub trait Device {
     fn name(&mut self) -> &'static str {
         return "None";
     }
+
+    const UART0: usize = 0;
 }

arch/riscv/src/kernel/hifive.rs

@@ -7,6 +7,10 @@ use hifive1::hal::time::U32Ext;
 pub struct Board;
 
 impl Board {
+    pub fn new() -> Self {
+        return Board;
+    }
+
     pub fn peripherals(&mut self) -> DevicePeripherals {
         let dr = DeviceResources::take().unwrap();
         let p = dr.peripherals;
@@ -36,4 +40,6 @@ impl device::Device for Board {
     fn name(&mut self) -> &'static str {
         return "HiFive";
     }
+
+    const UART0: usize = 0x1001_3000;
 }

arch/riscv/src/kernel/mod.rs

@@ -2,6 +2,7 @@ pub mod device;
 pub mod panic;
 pub mod printk;
 pub mod riscv;
+pub mod syscalls;
 pub mod uart;
 
 #[cfg(feature = "hifive")]

arch/riscv/src/kernel/printk.rs

@@ -8,6 +8,12 @@ pub unsafe extern "C" fn _riscv_printk(fmt: Arguments) {
     write!(Uart::new(uart), "{}{}", fmt, "\n");
 }
 
+#[export_name = "_kernel_main_print"]
+#[no_mangle]
+pub extern "C" fn _riscv_main_print(fmt: Arguments) {
+
+}
+
 #[macro_export]
 macro_rules! riscv_printk {
     ($($arg:tt)*) => {$crate::kernel::printk::_riscv_printk(format_args!($($arg)*))};

arch/riscv/src/kernel/riscv.rs

@@ -1,4 +1,4 @@
-use kinfo::info::set_info;
+use kinfo::status::set_status;
 use modules::modules::KernelModules;
 use modules::start::arch_modules_init;
 use crate::riscv_printk;
@@ -9,7 +9,7 @@ unsafe fn mm_init() {
     let (mut sbss, mut ebss) = bss_memory.bss_values();
 
     if sbss < ebss {
-        set_info("not ok");
+        set_status("not ok");
         riscv_printk!("    bss start is less than bss end");
         riscv_printk!("    sbss {} < ebss {}", sbss, ebss);
         r0::zero_bss(&mut sbss, &mut ebss);

arch/riscv/src/kernel/syscalls.rs

@@ -0,0 +1,17 @@
+use super::board::Board;
+use super::uart::Uart;
+use crate::kernel::device::Device;
+
+#[no_mangle]
+pub unsafe extern "C" fn sys_write(write: u8) {
+    let mut uart = Uart::new(Board::UART0);
+
+    uart.write_byte(write);
+}
+
+#[no_mangle]
+pub unsafe extern "C" fn sys_read() -> u8 {
+    let mut uart = Uart::new(Board::UART0);
+
+    return uart.read();
+}

arch/riscv/src/kernel/uart.rs

@@ -42,20 +42,25 @@ impl Uart {
     }
 
     // I/O
-    pub unsafe fn write_byte(&mut self, byte: u8) {
+    pub fn write_byte(&mut self, byte: u8) {
         let mut uart = self.address as *mut u8;
-        uart.add(0).write_volatile(byte);
+        unsafe { uart.add(0).write_volatile(byte); }
     }
 
-    pub unsafe fn write_bytes(&mut self, bytes: &[u8]) {
+    pub fn write_bytes(&mut self, bytes: &[u8]) {
         for byte in bytes {
             self.write_byte(*byte);
         }
     }
 
-    pub unsafe fn write_string(&mut self, string: &str) {
+    pub fn write_string(&mut self, string: &str) {
         self.write_bytes(string.as_bytes());
     }
+
+    pub fn read(&mut self) -> u8 {
+        let mut uart = self.address as *mut u8;
+        return unsafe { uart.add(0).read_volatile() };
+    }
 }
 
 impl Write for Uart {

arch/riscv/src/kernel/virt.rs

@@ -2,6 +2,12 @@ use super::{device, uart};
 
 pub struct Board;
 
+impl Board {
+    pub fn new() -> Self {
+        return Board;
+    }
+}
+
 impl device::Device for Board {
     fn device_init(&mut self) {
         self.io_init();
@@ -14,4 +20,6 @@ impl device::Device for Board {
     fn name(&mut self) -> &'static str {
         return "Qemu Virt";
     }
+
+    const UART0: usize = 0x1000_0000;
 }

arch/riscv/src/lib.rs

@@ -1,6 +1,6 @@
 #![no_std]
 #![feature(panic_info_message)]
-#![feature(asm, global_asm)]
+#![feature(alloc_error_handler, asm, global_asm)]
 
 #[macro_use] extern crate kinfo;
 #[macro_use] extern crate riscv_rt;

arch/riscv/src/mm/alloc.rs

@@ -0,0 +1,25 @@
+use core::alloc::{GlobalAlloc, Layout};
+use core::ptr::null_mut;
+use crate::riscv_printk;
+
+pub struct Allocator;
+
+#[global_allocator]
+pub static GLOBAL_ALLOCATOR: Allocator = Allocator;
+
+unsafe impl GlobalAlloc for Allocator {
+    unsafe fn alloc(&self, _layout: Layout) -> *mut u8 {
+        null_mut()
+    }
+
+    unsafe fn dealloc(&self, _ptr: *mut u8, _layout: Layout) {
+        loop {  }
+    }
+}
+
+#[alloc_error_handler]
+unsafe fn alloc_error(_layout: Layout) -> ! {
+    riscv_printk!("Alloc memory layout:");
+    riscv_printk!("    {:?}", _layout);
+    panic!("Alloc memory error");
+}

arch/riscv/src/mm/mod.rs

@@ -1 +1,2 @@
+pub mod alloc;
 pub mod bss;

lib/libc/src/unistd.rs

@@ -1,6 +1,7 @@
 extern "C" {
     pub fn syscall(sys_num: i32, sys_arg: u8);
     pub fn sys_write(write: u8);
+    pub fn sys_read() -> u8;
 }
 
 #[cfg(target_arch = "x86_64")]
@@ -19,3 +20,12 @@ pub mod aarch64 {
 
 #[cfg(target_arch = "aarch64")]
 pub use aarch64::*;
+
+#[cfg(any(target_arch = "riscv32", target_arch = "riscv64"))]
+pub mod riscv {
+    pub const READ: i32 = 63;
+    pub const WRITE: i32 = 64;
+}
+
+#[cfg(any(target_arch = "riscv32", target_arch = "riscv64"))]
+pub use riscv::*;

src/main.rs

@@ -11,11 +11,8 @@ pub use novusk::arm;
 
 #[cfg(target_arch = "x86_64")]
 pub use novusk::x86_64;
-use libc::unistd::{syscall, WRITE};
 
 #[no_mangle]
 pub unsafe extern "C" fn kernel_main() {
     printk::printk!("\nKernel Main");
-
-    syscall(WRITE, 69);
 }