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fix: incorrect sleigh in e_stmvsprw for PPC VLE #4886

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Ninja3047
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The cr bits are 1 byte which means they can't be shifted more than 8 bits.

        40001b38 18 21 11 14     e_stmvsprw local_3c(r1)
                                                      $U6c580:8 = INT_ADD r1, 20:8
                                                      tea = COPY $U6c580:8
                                                      $U6fe80:4 = COPY 0:4
                                                      $U6ff00:1 = INT_AND cr0, 15:1
                                                      $U6ff80:1 = INT_LEFT $U6ff00:1, 0:4
                                                      $U70000:4 = INT_ZEXT $U6ff80:1
                                                      $U6fe80:4 = INT_OR $U6fe80:4, $U70000:4
                                                      $U70100:1 = INT_AND cr1, 15:1
                                                      $U70180:1 = INT_LEFT $U70100:1, 4:4
                                                      $U70200:4 = INT_ZEXT $U70180:1
                                                      $U6fe80:4 = INT_OR $U6fe80:4, $U70200:4
                                                      $U70300:1 = INT_AND cr2, 15:1
                                                      $U70380:1 = INT_LEFT $U70300:1, 8:4
                                                      $U70400:4 = INT_ZEXT $U70380:1
                                                      $U6fe80:4 = INT_OR $U6fe80:4, $U70400:4
                                                      $U70500:1 = INT_AND cr3, 15:1
                                                      $U70580:1 = INT_LEFT $U70500:1, 12:4
                                                      $U70600:4 = INT_ZEXT $U70580:1
                                                      $U6fe80:4 = INT_OR $U6fe80:4, $U70600:4
                                                      $U70700:1 = INT_AND cr4, 15:1
                                                      $U70780:1 = INT_LEFT $U70700:1, 16:4
                                                      $U70800:4 = INT_ZEXT $U70780:1
                                                      $U6fe80:4 = INT_OR $U6fe80:4, $U70800:4
                                                      $U70900:1 = INT_AND cr5, 15:1
                                                      $U70980:1 = INT_LEFT $U70900:1, 20:4
                                                      $U70a00:4 = INT_ZEXT $U70980:1
                                                      $U6fe80:4 = INT_OR $U6fe80:4, $U70a00:4
                                                      $U70b00:1 = INT_AND cr6, 15:1
                                                      $U70b80:1 = INT_LEFT $U70b00:1, 24:4
                                                      $U70c00:4 = INT_ZEXT $U70b80:1

They should be zero extended first and then shifted.

@Ninja3047
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@GhidorahRex any updates on this and #4887 ?

@GhidorahRex
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Sorry, I've been playing catch-up a lot. This one looks good for sure. I'll try to get it put in soon. #4887 might need a bit of tweaking. I just need to make sure moving that instruction doesn't impact anything.

@GhidorahRex GhidorahRex added Status: Internal This is being tracked internally by the Ghidra team and removed Status: Triage Information is being gathered labels Apr 14, 2023
@ryanmkurtz ryanmkurtz added this to the 10.3.1 milestone May 18, 2023
@ryanmkurtz ryanmkurtz merged commit 0cae3ab into NationalSecurityAgency:master May 20, 2023
@Ninja3047 Ninja3047 deleted the fix-ppc-stmvsprw branch May 22, 2023 14:22
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3 participants