/
com.c
2858 lines (2434 loc) · 67.6 KB
/
com.c
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/* $NetBSD: com.c,v 1.373 2021/11/12 21:57:13 jmcneill Exp $ */
/*-
* Copyright (c) 1998, 1999, 2004, 2008 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Charles M. Hannum.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Copyright (c) 1991 The Regents of the University of California.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)com.c 7.5 (Berkeley) 5/16/91
*/
/*
* COM driver, uses National Semiconductor NS16450/NS16550AF UART
* Supports automatic hardware flow control on StarTech ST16C650A UART
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: com.c,v 1.373 2021/11/12 21:57:13 jmcneill Exp $");
#include "opt_com.h"
#include "opt_ddb.h"
#include "opt_kgdb.h"
#include "opt_lockdebug.h"
#include "opt_multiprocessor.h"
#include "opt_ntp.h"
/* The COM16650 option was renamed to COM_16650. */
#ifdef COM16650
#error Obsolete COM16650 option; use COM_16650 instead.
#endif
/*
* Override cnmagic(9) macro before including <sys/systm.h>.
* We need to know if cn_check_magic triggered debugger, so set a flag.
* Callers of cn_check_magic must declare int cn_trapped = 0;
* XXX: this is *ugly*!
*/
#define cn_trap() \
do { \
console_debugger(); \
cn_trapped = 1; \
(void)cn_trapped; \
} while (/* CONSTCOND */ 0)
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/ioctl.h>
#include <sys/select.h>
#include <sys/poll.h>
#include <sys/tty.h>
#include <sys/proc.h>
#include <sys/conf.h>
#include <sys/file.h>
#include <sys/uio.h>
#include <sys/kernel.h>
#include <sys/syslog.h>
#include <sys/device.h>
#include <sys/malloc.h>
#include <sys/timepps.h>
#include <sys/vnode.h>
#include <sys/kauth.h>
#include <sys/intr.h>
#ifdef RND_COM
#include <sys/rndsource.h>
#endif
#include <sys/bus.h>
#include <dev/ic/comreg.h>
#include <dev/ic/comvar.h>
#include <dev/ic/ns16550reg.h>
#include <dev/ic/st16650reg.h>
#include <dev/ic/hayespreg.h>
#define com_lcr com_cfcr
#include <dev/cons.h>
#include "ioconf.h"
#define CSR_READ_1(r, o) \
(r)->cr_read((r), (r)->cr_map[o])
#define CSR_WRITE_1(r, o, v) \
(r)->cr_write((r), (r)->cr_map[o], (v))
#define CSR_WRITE_MULTI(r, o, p, n) \
(r)->cr_write_multi((r), (r)->cr_map[o], (p), (n))
/*
* XXX COM_TYPE_AU1x00 specific
*/
#define CSR_WRITE_2(r, o, v) \
bus_space_write_2((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o], v)
#define CSR_READ_2(r, o) \
bus_space_read_2((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o])
static void com_enable_debugport(struct com_softc *);
void com_config(struct com_softc *);
void com_shutdown(struct com_softc *);
int comspeed(long, long, int);
static u_char cflag2lcr(tcflag_t);
int comparam(struct tty *, struct termios *);
void comstart(struct tty *);
int comhwiflow(struct tty *, int);
void com_loadchannelregs(struct com_softc *);
void com_hwiflow(struct com_softc *);
void com_break(struct com_softc *, int);
void com_modem(struct com_softc *, int);
void tiocm_to_com(struct com_softc *, u_long, int);
int com_to_tiocm(struct com_softc *);
void com_iflush(struct com_softc *);
int com_common_getc(dev_t, struct com_regs *);
static void com_common_putc(dev_t, struct com_regs *, int, int);
int cominit(struct com_regs *, int, int, int, tcflag_t);
static int comcnreattach(void);
int comcngetc(dev_t);
void comcnputc(dev_t, int);
void comcnpollc(dev_t, int);
#define integrate static inline
void comsoft(void *);
integrate void com_rxsoft(struct com_softc *, struct tty *);
integrate void com_txsoft(struct com_softc *, struct tty *);
integrate void com_stsoft(struct com_softc *, struct tty *);
integrate void com_schedrx(struct com_softc *);
void comdiag(void *);
dev_type_open(comopen);
dev_type_close(comclose);
dev_type_read(comread);
dev_type_write(comwrite);
dev_type_ioctl(comioctl);
dev_type_stop(comstop);
dev_type_tty(comtty);
dev_type_poll(compoll);
static struct comcons_info comcons_info;
/*
* Following are all routines needed for COM to act as console
*/
static struct consdev comcons = {
.cn_getc = comcngetc,
.cn_putc = comcnputc,
.cn_pollc = comcnpollc,
.cn_dev = NODEV,
.cn_pri = CN_NORMAL
};
const struct cdevsw com_cdevsw = {
.d_open = comopen,
.d_close = comclose,
.d_read = comread,
.d_write = comwrite,
.d_ioctl = comioctl,
.d_stop = comstop,
.d_tty = comtty,
.d_poll = compoll,
.d_mmap = nommap,
.d_kqfilter = ttykqfilter,
.d_discard = nodiscard,
.d_flag = D_TTY
};
/*
* Make this an option variable one can patch.
* But be warned: this must be a power of 2!
*/
u_int com_rbuf_size = COM_RING_SIZE;
/* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */
u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4;
u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4;
static int comconsattached;
static struct cnm_state com_cnm_state;
#ifdef KGDB
#include <sys/kgdb.h>
static struct com_regs comkgdbregs;
static int com_kgdb_attached;
int com_kgdb_getc(void *);
void com_kgdb_putc(void *, int);
#endif /* KGDB */
/* initializer for typical 16550-ish hardware */
static const bus_size_t com_std_map[COM_REGMAP_NENTRIES] = {
[COM_REG_RXDATA] = com_data,
[COM_REG_TXDATA] = com_data,
[COM_REG_DLBL] = com_dlbl,
[COM_REG_DLBH] = com_dlbh,
[COM_REG_IER] = com_ier,
[COM_REG_IIR] = com_iir,
[COM_REG_FIFO] = com_fifo,
[COM_REG_TCR] = com_fifo,
[COM_REG_EFR] = com_efr,
[COM_REG_TLR] = com_efr,
[COM_REG_LCR] = com_lcr,
[COM_REG_MCR] = com_mcr,
[COM_REG_LSR] = com_lsr,
[COM_REG_MSR] = com_msr,
[COM_REG_USR] = com_usr,
[COM_REG_TFL] = com_tfl,
[COM_REG_RFL] = com_rfl,
[COM_REG_HALT] = com_halt,
[COM_REG_MDR1] = com_mdr1,
};
#define COMDIALOUT_MASK TTDIALOUT_MASK
#define COMUNIT(x) TTUNIT(x)
#define COMDIALOUT(x) TTDIALOUT(x)
#define COM_ISALIVE(sc) ((sc)->enabled != 0 && \
device_is_active((sc)->sc_dev))
#define BR BUS_SPACE_BARRIER_READ
#define BW BUS_SPACE_BARRIER_WRITE
#define COM_BARRIER(r, f) \
bus_space_barrier((r)->cr_iot, (r)->cr_ioh, 0, (r)->cr_nports, (f))
/*
* com_read_1 --
* Default register read callback using single byte accesses.
*/
static uint8_t
com_read_1(struct com_regs *regs, u_int reg)
{
return bus_space_read_1(regs->cr_iot, regs->cr_ioh, reg);
}
/*
* com_write_1 --
* Default register write callback using single byte accesses.
*/
static void
com_write_1(struct com_regs *regs, u_int reg, uint8_t val)
{
bus_space_write_1(regs->cr_iot, regs->cr_ioh, reg, val);
}
/*
* com_write_multi_1 --
* Default register multi write callback using single byte accesses.
*/
static void
com_write_multi_1(struct com_regs *regs, u_int reg, const uint8_t *datap,
bus_size_t count)
{
bus_space_write_multi_1(regs->cr_iot, regs->cr_ioh, reg, datap, count);
}
/*
* com_read_4 --
* Default register read callback using dword accesses.
*/
static uint8_t
com_read_4(struct com_regs *regs, u_int reg)
{
return bus_space_read_4(regs->cr_iot, regs->cr_ioh, reg) & 0xff;
}
/*
* com_write_4 --
* Default register write callback using dword accesses.
*/
static void
com_write_4(struct com_regs *regs, u_int reg, uint8_t val)
{
bus_space_write_4(regs->cr_iot, regs->cr_ioh, reg, val);
}
/*
* com_write_multi_4 --
* Default register multi write callback using dword accesses.
*/
static void
com_write_multi_4(struct com_regs *regs, u_int reg, const uint8_t *datap,
bus_size_t count)
{
while (count-- > 0) {
bus_space_write_4(regs->cr_iot, regs->cr_ioh, reg, *datap++);
}
}
/*
* com_init_regs --
* Driver front-ends use this to initialize our register map
* in the standard fashion. They may then tailor the map to
* their own particular requirements.
*/
void
com_init_regs(struct com_regs *regs, bus_space_tag_t st, bus_space_handle_t sh,
bus_addr_t addr)
{
memset(regs, 0, sizeof(*regs));
regs->cr_iot = st;
regs->cr_ioh = sh;
regs->cr_iobase = addr;
regs->cr_nports = COM_NPORTS;
regs->cr_read = com_read_1;
regs->cr_write = com_write_1;
regs->cr_write_multi = com_write_multi_1;
memcpy(regs->cr_map, com_std_map, sizeof(regs->cr_map));
}
/*
* com_init_regs_stride --
* Convenience function for front-ends that have a stride between
* registers.
*/
void
com_init_regs_stride(struct com_regs *regs, bus_space_tag_t st,
bus_space_handle_t sh, bus_addr_t addr, u_int regshift)
{
com_init_regs(regs, st, sh, addr);
for (size_t i = 0; i < __arraycount(regs->cr_map); i++) {
regs->cr_map[i] <<= regshift;
}
regs->cr_nports <<= regshift;
}
/*
* com_init_regs_stride_width --
* Convenience function for front-ends that have a stride between
* registers and specific I/O width requirements.
*/
void
com_init_regs_stride_width(struct com_regs *regs, bus_space_tag_t st,
bus_space_handle_t sh, bus_addr_t addr,
u_int regshift, u_int width)
{
com_init_regs(regs, st, sh, addr);
for (size_t i = 0; i < __arraycount(regs->cr_map); i++) {
regs->cr_map[i] <<= regshift;
}
regs->cr_nports <<= regshift;
switch (width) {
case 1:
/* Already set by com_init_regs */
break;
case 4:
regs->cr_read = com_read_4;
regs->cr_write = com_write_4;
regs->cr_write_multi = com_write_multi_4;
break;
default:
panic("com: unsupported I/O width %d", width);
}
}
/*ARGSUSED*/
int
comspeed(long speed, long frequency, int type)
{
#define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */
int x, err;
int divisor = 16;
if ((type == COM_TYPE_OMAP) && (speed > 230400)) {
divisor = 13;
}
if (speed == 0)
return (0);
if (speed < 0)
return (-1);
x = divrnd(frequency / divisor, speed);
if (x <= 0)
return (-1);
err = divrnd(((quad_t)frequency) * 1000 / divisor, speed * x) - 1000;
if (err < 0)
err = -err;
if (err > COM_TOLERANCE)
return (-1);
return (x);
#undef divrnd
}
#ifdef COM_DEBUG
int com_debug = 0;
void comstatus(struct com_softc *, const char *);
void
comstatus(struct com_softc *sc, const char *str)
{
struct tty *tp = sc->sc_tty;
aprint_normal_dev(sc->sc_dev,
"%s %cclocal %cdcd %cts_carr_on %cdtr %ctx_stopped\n",
str,
ISSET(tp->t_cflag, CLOCAL) ? '+' : '-',
ISSET(sc->sc_msr, MSR_DCD) ? '+' : '-',
ISSET(tp->t_state, TS_CARR_ON) ? '+' : '-',
ISSET(sc->sc_mcr, MCR_DTR) ? '+' : '-',
sc->sc_tx_stopped ? '+' : '-');
aprint_normal_dev(sc->sc_dev,
"%s %ccrtscts %ccts %cts_ttstop %crts rx_flags=0x%x\n",
str,
ISSET(tp->t_cflag, CRTSCTS) ? '+' : '-',
ISSET(sc->sc_msr, MSR_CTS) ? '+' : '-',
ISSET(tp->t_state, TS_TTSTOP) ? '+' : '-',
ISSET(sc->sc_mcr, MCR_RTS) ? '+' : '-',
sc->sc_rx_flags);
}
#endif
int
com_probe_subr(struct com_regs *regs)
{
/* force access to id reg */
CSR_WRITE_1(regs, COM_REG_LCR, LCR_8BITS);
CSR_WRITE_1(regs, COM_REG_IIR, 0);
if ((CSR_READ_1(regs, COM_REG_LCR) != LCR_8BITS) ||
(CSR_READ_1(regs, COM_REG_IIR) & 0x38))
return (0);
return (1);
}
int
comprobe1(bus_space_tag_t iot, bus_space_handle_t ioh)
{
struct com_regs regs;
com_init_regs(®s, iot, ioh, 0/*XXX*/);
return com_probe_subr(®s);
}
/*
* No locking in this routine; it is only called during attach,
* or with the port already locked.
*/
static void
com_enable_debugport(struct com_softc *sc)
{
/* Turn on line break interrupt, set carrier. */
sc->sc_ier = IER_ERLS;
if (sc->sc_type == COM_TYPE_PXA2x0)
sc->sc_ier |= IER_EUART | IER_ERXTOUT;
if (sc->sc_type == COM_TYPE_INGENIC ||
sc->sc_type == COM_TYPE_TEGRA)
sc->sc_ier |= IER_ERXTOUT;
CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, sc->sc_ier);
SET(sc->sc_mcr, MCR_DTR | MCR_RTS);
CSR_WRITE_1(&sc->sc_regs, COM_REG_MCR, sc->sc_mcr);
}
static void
com_intr_poll(void *arg)
{
struct com_softc * const sc = arg;
comintr(sc);
callout_schedule(&sc->sc_poll_callout, sc->sc_poll_ticks);
}
void
com_attach_subr(struct com_softc *sc)
{
struct com_regs *regsp = &sc->sc_regs;
struct tty *tp;
uint32_t cpr;
uint8_t lcr;
const char *fifo_msg = NULL;
prop_dictionary_t dict;
bool is_console = true;
bool force_console = false;
aprint_naive("\n");
dict = device_properties(sc->sc_dev);
prop_dictionary_get_bool(dict, "is_console", &is_console);
prop_dictionary_get_bool(dict, "force_console", &force_console);
callout_init(&sc->sc_diag_callout, 0);
callout_init(&sc->sc_poll_callout, 0);
callout_setfunc(&sc->sc_poll_callout, com_intr_poll, sc);
mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_HIGH);
#if defined(COM_16650)
sc->sc_type = COM_TYPE_16650;
#elif defined(COM_16750)
sc->sc_type = COM_TYPE_16750;
#elif defined(COM_HAYESP)
sc->sc_type = COM_TYPE_HAYESP;
#elif defined(COM_PXA2X0)
sc->sc_type = COM_TYPE_PXA2x0;
#endif
/* Disable interrupts before configuring the device. */
if (sc->sc_type == COM_TYPE_PXA2x0)
sc->sc_ier = IER_EUART;
else
sc->sc_ier = 0;
CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier);
if ((bus_space_is_equal(regsp->cr_iot, comcons_info.regs.cr_iot) &&
regsp->cr_iobase == comcons_info.regs.cr_iobase) || force_console) {
comconsattached = 1;
if (force_console)
memcpy(regsp, &comcons_info.regs, sizeof(*regsp));
if (cn_tab == NULL && comcnreattach() != 0) {
printf("can't re-init serial console @%lx\n",
(u_long)comcons_info.regs.cr_iobase);
}
switch (sc->sc_type) {
case COM_TYPE_16750:
case COM_TYPE_DW_APB:
/* Use in comintr(). */
sc->sc_lcr = cflag2lcr(comcons_info.cflag);
break;
}
/* Make sure the console is always "hardwired". */
delay(10000); /* wait for output to finish */
if (is_console) {
SET(sc->sc_hwflags, COM_HW_CONSOLE);
}
SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
}
/* Probe for FIFO */
switch (sc->sc_type) {
case COM_TYPE_HAYESP:
goto fifodone;
case COM_TYPE_AU1x00:
sc->sc_fifolen = 16;
fifo_msg = "Au1X00 UART";
SET(sc->sc_hwflags, COM_HW_FIFO);
goto fifodelay;
case COM_TYPE_16550_NOERS:
sc->sc_fifolen = 16;
fifo_msg = "ns16650, no ERS";
SET(sc->sc_hwflags, COM_HW_FIFO);
goto fifodelay;
case COM_TYPE_OMAP:
sc->sc_fifolen = 64;
fifo_msg = "OMAP UART";
SET(sc->sc_hwflags, COM_HW_FIFO);
goto fifodelay;
case COM_TYPE_INGENIC:
sc->sc_fifolen = 16;
fifo_msg = "Ingenic UART";
SET(sc->sc_hwflags, COM_HW_FIFO);
SET(sc->sc_hwflags, COM_HW_NOIEN);
goto fifodelay;
case COM_TYPE_TEGRA:
sc->sc_fifolen = 8;
fifo_msg = "Tegra UART";
SET(sc->sc_hwflags, COM_HW_FIFO);
CSR_WRITE_1(regsp, COM_REG_FIFO,
FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1);
goto fifodelay;
case COM_TYPE_BCMAUXUART:
sc->sc_fifolen = 1;
fifo_msg = "BCM AUX UART";
SET(sc->sc_hwflags, COM_HW_FIFO);
CSR_WRITE_1(regsp, COM_REG_FIFO,
FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1);
goto fifodelay;
case COM_TYPE_DW_APB:
if (!prop_dictionary_get_uint(dict, "fifolen", &sc->sc_fifolen)) {
cpr = bus_space_read_4(sc->sc_regs.cr_iot,
sc->sc_regs.cr_ioh, DW_APB_UART_CPR);
sc->sc_fifolen = __SHIFTOUT(cpr, UART_CPR_FIFO_MODE) * 16;
}
if (sc->sc_fifolen == 0) {
sc->sc_fifolen = 1;
fifo_msg = "DesignWare APB UART, no fifo";
CSR_WRITE_1(regsp, COM_REG_FIFO, 0);
} else {
fifo_msg = "DesignWare APB UART";
SET(sc->sc_hwflags, COM_HW_FIFO);
CSR_WRITE_1(regsp, COM_REG_FIFO,
FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1);
}
goto fifodelay;
}
sc->sc_fifolen = 1;
/* look for a NS 16550AF UART with FIFOs */
if (sc->sc_type == COM_TYPE_INGENIC) {
CSR_WRITE_1(regsp, COM_REG_FIFO,
FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST |
FIFO_TRIGGER_14 | FIFO_UART_ON);
} else
CSR_WRITE_1(regsp, COM_REG_FIFO,
FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14);
delay(100);
if (ISSET(CSR_READ_1(regsp, COM_REG_IIR), IIR_FIFO_MASK)
== IIR_FIFO_MASK)
if (ISSET(CSR_READ_1(regsp, COM_REG_FIFO), FIFO_TRIGGER_14)
== FIFO_TRIGGER_14) {
SET(sc->sc_hwflags, COM_HW_FIFO);
fifo_msg = "ns16550a";
sc->sc_fifolen = 16;
/*
* IIR changes into the EFR if LCR is set to LCR_EERS
* on 16650s. We also know IIR != 0 at this point.
* Write 0 into the EFR, and read it. If the result
* is 0, we have a 16650.
*
* Older 16650s were broken; the test to detect them
* is taken from the Linux driver. Apparently
* setting DLAB enable gives access to the EFR on
* these chips.
*/
if (sc->sc_type == COM_TYPE_16650) {
lcr = CSR_READ_1(regsp, COM_REG_LCR);
CSR_WRITE_1(regsp, COM_REG_LCR, LCR_EERS);
CSR_WRITE_1(regsp, COM_REG_EFR, 0);
if (CSR_READ_1(regsp, COM_REG_EFR) == 0) {
CSR_WRITE_1(regsp, COM_REG_LCR,
lcr | LCR_DLAB);
if (CSR_READ_1(regsp, COM_REG_EFR) == 0) {
CLR(sc->sc_hwflags, COM_HW_FIFO);
sc->sc_fifolen = 0;
} else {
SET(sc->sc_hwflags, COM_HW_FLOW);
sc->sc_fifolen = 32;
}
} else
sc->sc_fifolen = 16;
CSR_WRITE_1(regsp, COM_REG_LCR, lcr);
if (sc->sc_fifolen == 0)
fifo_msg = "st16650, broken fifo";
else if (sc->sc_fifolen == 32)
fifo_msg = "st16650a";
else
fifo_msg = "ns16550a";
}
/*
* TL16C750 can enable 64byte FIFO, only when DLAB
* is 1. However, some 16750 may always enable. For
* example, restrictions according to DLAB in a data
* sheet for SC16C750 were not described.
* Please enable 'options COM_16650', supposing you
* use SC16C750. Probably 32 bytes of FIFO and HW FLOW
* should become effective.
*/
if (sc->sc_type == COM_TYPE_16750) {
uint8_t iir1, iir2;
uint8_t fcr = FIFO_ENABLE | FIFO_TRIGGER_14;
lcr = CSR_READ_1(regsp, COM_REG_LCR);
CSR_WRITE_1(regsp, COM_REG_LCR,
lcr & ~LCR_DLAB);
CSR_WRITE_1(regsp, COM_REG_FIFO,
fcr | FIFO_64B_ENABLE);
iir1 = CSR_READ_1(regsp, COM_REG_IIR);
CSR_WRITE_1(regsp, COM_REG_FIFO, fcr);
CSR_WRITE_1(regsp, COM_REG_LCR, lcr | LCR_DLAB);
CSR_WRITE_1(regsp, COM_REG_FIFO,
fcr | FIFO_64B_ENABLE);
iir2 = CSR_READ_1(regsp, COM_REG_IIR);
CSR_WRITE_1(regsp, COM_REG_LCR, lcr);
if (!ISSET(iir1, IIR_64B_FIFO) &&
ISSET(iir2, IIR_64B_FIFO)) {
/* It is TL16C750. */
sc->sc_fifolen = 64;
SET(sc->sc_hwflags, COM_HW_AFE);
} else
CSR_WRITE_1(regsp, COM_REG_FIFO, fcr);
if (sc->sc_fifolen == 64)
fifo_msg = "tl16c750";
else
fifo_msg = "ns16750";
}
} else
fifo_msg = "ns16550, broken fifo";
else
fifo_msg = "ns8250 or ns16450, no fifo";
CSR_WRITE_1(regsp, COM_REG_FIFO, 0);
fifodelay:
/*
* Some chips will clear down both Tx and Rx FIFOs when zero is
* written to com_fifo. If this chip is the console, writing zero
* results in some of the chip/FIFO description being lost, so delay
* printing it until now.
*/
delay(10);
if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) {
aprint_normal(": %s, %d-byte FIFO\n", fifo_msg, sc->sc_fifolen);
} else {
aprint_normal(": %s\n", fifo_msg);
}
if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) {
sc->sc_fifolen = 1;
aprint_normal_dev(sc->sc_dev, "txfifo disabled\n");
}
fifodone:
tp = tty_alloc();
tp->t_oproc = comstart;
tp->t_param = comparam;
tp->t_hwiflow = comhwiflow;
tp->t_softc = sc;
sc->sc_tty = tp;
sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_WAITOK);
sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf;
sc->sc_rbavail = com_rbuf_size;
sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1);
tty_attach(tp);
if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN))
SET(sc->sc_mcr, MCR_IENABLE);
if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
int maj;
/* locate the major number */
maj = cdevsw_lookup_major(&com_cdevsw);
tp->t_dev = cn_tab->cn_dev = makedev(maj,
device_unit(sc->sc_dev));
aprint_normal_dev(sc->sc_dev, "console\n");
}
#ifdef KGDB
/*
* Allow kgdb to "take over" this port. If this is
* not the console and is the kgdb device, it has
* exclusive use. If it's the console _and_ the
* kgdb device, it doesn't.
*/
if (bus_space_is_equal(regsp->cr_iot, comkgdbregs.cr_iot) &&
regsp->cr_iobase == comkgdbregs.cr_iobase) {
if (!ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
com_kgdb_attached = 1;
SET(sc->sc_hwflags, COM_HW_KGDB);
}
aprint_normal_dev(sc->sc_dev, "kgdb\n");
}
#endif
sc->sc_si = softint_establish(SOFTINT_SERIAL, comsoft, sc);
#ifdef RND_COM
rnd_attach_source(&sc->rnd_source, device_xname(sc->sc_dev),
RND_TYPE_TTY, RND_FLAG_DEFAULT);
#endif
/* if there are no enable/disable functions, assume the device
is always enabled */
if (!sc->enable)
sc->enabled = 1;
com_config(sc);
SET(sc->sc_hwflags, COM_HW_DEV_OK);
if (sc->sc_poll_ticks != 0)
callout_schedule(&sc->sc_poll_callout, sc->sc_poll_ticks);
}
void
com_config(struct com_softc *sc)
{
struct com_regs *regsp = &sc->sc_regs;
/* Disable interrupts before configuring the device. */
if (sc->sc_type == COM_TYPE_PXA2x0)
sc->sc_ier = IER_EUART;
else
sc->sc_ier = 0;
CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier);
(void) CSR_READ_1(regsp, COM_REG_IIR);
/* Look for a Hayes ESP board. */
if (sc->sc_type == COM_TYPE_HAYESP) {
/* Set 16550 compatibility mode */
bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD1,
HAYESP_SETMODE);
bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2,
HAYESP_MODE_FIFO|HAYESP_MODE_RTS|
HAYESP_MODE_SCALE);
/* Set RTS/CTS flow control */
bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD1,
HAYESP_SETFLOWTYPE);
bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2,
HAYESP_FLOW_RTS);
bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2,
HAYESP_FLOW_CTS);
/* Set flow control levels */
bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD1,
HAYESP_SETRXFLOW);
bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2,
HAYESP_HIBYTE(HAYESP_RXHIWMARK));
bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2,
HAYESP_LOBYTE(HAYESP_RXHIWMARK));
bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2,
HAYESP_HIBYTE(HAYESP_RXLOWMARK));
bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2,
HAYESP_LOBYTE(HAYESP_RXLOWMARK));
}
if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE|COM_HW_KGDB))
com_enable_debugport(sc);
}
#if 0
static int
comcngetc_detached(dev_t dev)
{
return 0;
}
static void
comcnputc_detached(dev_t dev, int c)
{
}
#endif
int
com_detach(device_t self, int flags)
{
struct com_softc *sc = device_private(self);
int maj, mn;
if (ISSET(sc->sc_hwflags, COM_HW_KGDB))
return EBUSY;
if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE) &&
(flags & DETACH_SHUTDOWN) != 0)
return EBUSY;
if (sc->disable != NULL && sc->enabled != 0) {
(*sc->disable)(sc);
sc->enabled = 0;
}
if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
comconsattached = 0;
cn_tab = NULL;
}
/* locate the major number */
maj = cdevsw_lookup_major(&com_cdevsw);
/* Nuke the vnodes for any open instances. */
mn = device_unit(self);
vdevgone(maj, mn, mn, VCHR);
mn |= COMDIALOUT_MASK;
vdevgone(maj, mn, mn, VCHR);
if (sc->sc_rbuf == NULL) {
/*
* Ring buffer allocation failed in the com_attach_subr,
* only the tty is allocated, and nothing else.
*/
tty_free(sc->sc_tty);
return 0;
}
/* Free the receive buffer. */
free(sc->sc_rbuf, M_DEVBUF);
/* Detach and free the tty. */
tty_detach(sc->sc_tty);
tty_free(sc->sc_tty);
/* Unhook the soft interrupt handler. */
softint_disestablish(sc->sc_si);
#ifdef RND_COM
/* Unhook the entropy source. */
rnd_detach_source(&sc->rnd_source);
#endif
callout_destroy(&sc->sc_diag_callout);
/* Destroy the lock. */
mutex_destroy(&sc->sc_lock);
return (0);
}
void
com_shutdown(struct com_softc *sc)
{
struct tty *tp = sc->sc_tty;
mutex_spin_enter(&sc->sc_lock);
/* If we were asserting flow control, then deassert it. */
SET(sc->sc_rx_flags, RX_IBUF_BLOCKED);
com_hwiflow(sc);
/* Clear any break condition set with TIOCSBRK. */
com_break(sc, 0);
/*
* Hang up if necessary. Wait a bit, so the other side has time to
* notice even if we immediately open the port again.
* Avoid tsleeping above splhigh().
*/
if (ISSET(tp->t_cflag, HUPCL)) {
com_modem(sc, 0);
microuptime(&sc->sc_hup_pending);
sc->sc_hup_pending.tv_sec++;
}
/* Turn off interrupts. */