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Merge 4003741 into ad00b7a
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pgleeson committed Aug 4, 2017
2 parents ad00b7a + 4003741 commit a369762
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Showing 5 changed files with 9 additions and 7 deletions.
3 changes: 3 additions & 0 deletions doc/backends/NeuroML.txt
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Expand Up @@ -2,3 +2,6 @@
NeuroML
=======

A subset of models specified in PyNN can be exported into NeuroML 2 format.

See https://github.com/NeuroML/NeuroML2/issues/73 for latest status.
4 changes: 2 additions & 2 deletions examples/Potjans2014/network.py
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Expand Up @@ -35,15 +35,15 @@ def setup(self, sim) :

# Spike recording
if record_fraction:
num_spikes = round(this_pop.size * frac_record_spikes)
num_spikes = int(round(this_pop.size * frac_record_spikes))
else:
num_spikes = n_record
this_pop[0:num_spikes].record('spikes')

# Membrane potential recording
if record_v:
if record_fraction:
num_v = round(this_pop.size * frac_record_v)
num_v = int(round(this_pop.size * frac_record_v))

else:
num_v = n_record_v
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2 changes: 1 addition & 1 deletion examples/Potjans2014/plotting.py
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Expand Up @@ -53,7 +53,7 @@ def show_raster_bars(t_start, t_stop, n_rec, frac_to_plot, path):
# Compute rates with all neurons
rate = 1000 * len(t_spikes) / (t_stop - t_start) * 1 / float(n_rec[layer][pop])
rates[i] = rate
print(pops[-i] + np.round(rate, 2))
#print(pops[-i] + np.round(rate, 2))
# Reduce data for raster plot
num_neurons = frac_to_plot * np.unique(ids).size
t_spikes = t_spikes[np.where(ids < num_neurons + id_count + 1)[0]]
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1 change: 0 additions & 1 deletion examples/Potjans2014/sim_params.py
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Expand Up @@ -8,7 +8,6 @@
'timestep' : 0.1, # ms
'threads' : 1,
'sim_duration' : 1000., # ms
'min_delay' : 0.1 # ms
}
}

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6 changes: 3 additions & 3 deletions pyNN/neuroml/__init__.py
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Expand Up @@ -36,13 +36,13 @@ def list_standard_models():


def setup(timestep=DEFAULT_TIMESTEP, min_delay=DEFAULT_MIN_DELAY,
max_delay=DEFAULT_MAX_DELAY, **extra_params):
**extra_params):
""" Set up for saving cell models and network structure to NeuroML """
common.setup(timestep, min_delay, max_delay, **extra_params)
common.setup(timestep, min_delay, **extra_params)
simulator.state.clear()
simulator.state.dt = timestep # move to common.setup?
simulator.state.min_delay = min_delay
simulator.state.max_delay = max_delay
simulator.state.max_delay = extra_params.get('max_delay', DEFAULT_MAX_DELAY)
simulator.state.mpi_rank = extra_params.get('rank', 0)
simulator.state.num_processes = extra_params.get('num_processes', 1)

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