Merge branch 'master' into feature/pip_install

OFS · Apr 10, 2023 · 5843f8e · 5843f8e
2 parents 12116f5 + 2065ed5
commit 5843f8e
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Showing 8 changed files with 29 additions and 17 deletions.
diff --git a/binaries/ofs.uio/uio/ofs_uio.py b/binaries/ofs.uio/uio/ofs_uio.py
@@ -1,5 +1,5 @@
 #! /usr/bin/env python3
-# Copyright(c) 2022, Intel Corporation
+# Copyright(c) 2022-2023, Intel Corporation
 #
 # Redistribution  and  use  in source  and  binary  forms,  with  or  without
 # modification, are permitted provided that the following conditions are met:
@@ -464,14 +464,14 @@ def mailbox_write(self, region_index, address, value):
         self.write64(region_index, self.MAILBOX_CMD_CSR, 0x0)
         time.sleep(MAILBOX_POLL_TIMEOUT)
 
+        # write value
+        self.write32(region_index, self.MAILBOX_WR_DATA_CSR, value)
+
         # Set write bit and write cmd address
         mbox_cmd_sts = mailbox_cmd_sts(0x2)
         mbox_cmd_sts.cmd_addr = address
         self.write64(region_index, self.MAILBOX_CMD_CSR, mbox_cmd_sts.value)
 
-        # write value
-        self.write32(region_index, self.MAILBOX_WR_DATA_CSR, value)
-
         # Poll for ACK_TRANS bit index 2, wdith 2
         if not self.read_poll_timeout(region_index,
                                       self.MAILBOX_CMD_CSR,

diff --git a/binaries/opae.io/opae/io/config.py b/binaries/opae.io/opae/io/config.py
@@ -98,10 +98,10 @@
     'platform': 'Intel Acceleration Development Platform N6001'
   },
   (0x8086, 0xbcce, 0x8086, 0x17d4): {
-    'platform': 'Intel Acceleration Development Platform C6100'
+    'platform': 'Intel IPU Platform F2000X-PL'
   },
   (0x8086, 0xbccf, 0x8086, 0x17d4): {
-    'platform': 'Intel Acceleration Development Platform C6100'
+    'platform': 'Intel IPU Platform F2000X-PL'
   },
   (0x8086, 0xaf00, 0x8086, 0): {
     'platform': 'Intel Open FPGA Stack Platform'

diff --git a/libraries/libopae-c/cfg-file.c b/libraries/libopae-c/cfg-file.c
@@ -416,7 +416,7 @@ STATIC fpgainfo_config_data default_fpgainfo_config_table[] = {
 	"Intel Acceleration Development Platform N6001" },
 
 	{ 0x8086, 0xbcce, 0x8086, 0x17d4, 0x12, "libboard_c6100.so", NULL,
-	"Intel Acceleration Development Platform C6100" },
+	"Intel IPU Platform F2000X-PL" },
 
 	{ 0,      0, 0, 0, -1,         NULL, NULL, "" }
 };

diff --git a/opae.cfg b/opae.cfg
@@ -553,7 +553,7 @@
 
     "c6100": {
       "enabled": true,
-      "platform": "Intel Acceleration Development Platform C6100",
+      "platform": "Intel IPU Platform F2000X-PL",
 
       "devices": [
         { "name": "c6100_pf", "id": [ "0x8086", "0xbcce", "0x8086", "0x17d4" ] },

diff --git a/python/opae.admin/opae/admin/config.py b/python/opae.admin/opae/admin/config.py
@@ -137,10 +137,10 @@
     'platform': 'Intel Acceleration Development Platform N6001'
   },
   (0x8086, 0xbcce, 0x8086, 0x17d4): {
-    'platform': 'Intel Acceleration Development Platform C6100'
+    'platform': 'Intel IPU Platform F2000X-PL'
   },
   (0x8086, 0xbccf, 0x8086, 0x17d4): {
-    'platform': 'Intel Acceleration Development Platform C6100'
+    'platform': 'Intel IPU Platform F2000X-PL'
   },
   (0x8086, 0xaf00, 0x8086, 0): {
     'platform': 'Intel Open FPGA Stack Platform'

diff --git a/samples/host_exerciser/host_exerciser_cmd.h b/samples/host_exerciser/host_exerciser_cmd.h
@@ -497,10 +497,22 @@ class host_exerciser_cmd : public test_command
         // Interrupt test mode
         if (he_lpbk_cfg_.IntrTestMode == 1) {
             if (!he_interrupt(ev)) {
-	            status = -1;
+                status = -1;
+                if (host_exe_->logger_->should_log(spdlog::level::debug)) {
+                    std::cout << std::endl;
+                    he_dump_buffer(source_, "Post-execution source");
+                    he_dump_buffer(destination_, "Post-execution destination");
+                    std::cout << std::endl;
+                }
             }
             else {
                 status = he_compare_buffer();
+                if (host_exe_->logger_->should_log(spdlog::level::debug)) {
+                    std::cout << std::endl;
+                    he_dump_buffer(source_, "Post-execution source");
+                    he_dump_buffer(destination_, "Post-execution destination");
+                    std::cout << std::endl;
+                }
                 he_perf_counters();
             }
         } else if (host_exe_->he_continuousmode_) {

diff --git a/tests/opae.admin/test_config.py b/tests/opae.admin/test_config.py
@@ -186,7 +186,7 @@
 
     "c6100": {
       "enabled": true,
-      "platform": "Intel Acceleration Development Platform C6100",
+      "platform": "Intel IPU Platform F2000X-PL",
   
       "devices": [
         { "name": "c6100_pf", "id": [ "0x8086", "0xbcce", "0x8086", "0x17d4" ] },
@@ -472,8 +472,8 @@ def test_fpgareg_platform_for(self):
         assert Config.fpgareg_platform_for(0x8086, 0xbccf, 0x8086, 0x1770) == 'Intel Acceleration Development Platform N6000'
         assert Config.fpgareg_platform_for(0x8086, 0xbcce, 0x8086, 0x1771) == 'Intel Acceleration Development Platform N6001'
         assert Config.fpgareg_platform_for(0x8086, 0xbccf, 0x8086, 0x1771) == 'Intel Acceleration Development Platform N6001'
-        assert Config.fpgareg_platform_for(0x8086, 0xbcce, 0x8086, 0x17d4) == 'Intel Acceleration Development Platform C6100'
-        assert Config.fpgareg_platform_for(0x8086, 0xbccf, 0x8086, 0x17d4) == 'Intel Acceleration Development Platform C6100'
+        assert Config.fpgareg_platform_for(0x8086, 0xbcce, 0x8086, 0x17d4) == 'Intel IPU Platform F2000X-PL'
+        assert Config.fpgareg_platform_for(0x8086, 0xbccf, 0x8086, 0x17d4) == 'Intel IPU Platform F2000X-PL'
         assert Config.fpgareg_platform_for(0x8086, 0xaf00, 0x8086, 0) == 'Intel Open FPGA Stack Platform'
         assert Config.fpgareg_platform_for(0x8086, 0xaf01, 0x8086, 0) == 'Intel Open FPGA Stack Platform'
         assert Config.fpgareg_platform_for(0x8086, 0xbcce, 0x8086, 0) == 'Intel Open FPGA Stack Platform'

diff --git a/tests/opae.io/test_config.py b/tests/opae.io/test_config.py
@@ -175,7 +175,7 @@
 
     "c6100": {
       "enabled": true,
-      "platform": "Intel Acceleration Development Platform C6100",
+      "platform": "Intel IPU Platform F2000X-PL",
 
       "devices": [
         { "name": "c6100_pf", "id": [ "0x8086", "0xbcce", "0x8086", "0x17d4" ] },
@@ -337,8 +337,8 @@ def test_opae_io_platform_for(self):
         assert Config.opae_io_platform_for(0x8086, 0xbccf, 0x8086, 0x1770) == 'Intel Acceleration Development Platform N6000'
         assert Config.opae_io_platform_for(0x8086, 0xbcce, 0x8086, 0x1771) == 'Intel Acceleration Development Platform N6001'
         assert Config.opae_io_platform_for(0x8086, 0xbccf, 0x8086, 0x1771) == 'Intel Acceleration Development Platform N6001'
-        assert Config.opae_io_platform_for(0x8086, 0xbcce, 0x8086, 0x17d4) == 'Intel Acceleration Development Platform C6100'
-        assert Config.opae_io_platform_for(0x8086, 0xbccf, 0x8086, 0x17d4) == 'Intel Acceleration Development Platform C6100'
+        assert Config.opae_io_platform_for(0x8086, 0xbcce, 0x8086, 0x17d4) == 'Intel IPU Platform F2000X-PL'
+        assert Config.opae_io_platform_for(0x8086, 0xbccf, 0x8086, 0x17d4) == 'Intel IPU Platform F2000X-PL'
         assert Config.opae_io_platform_for(0x8086, 0xaf00, 0x8086, 0) == 'Intel Open FPGA Stack Platform'
         assert Config.opae_io_platform_for(0x8086, 0xaf01, 0x8086, 0) == 'Intel Open FPGA Stack Platform'
         assert Config.opae_io_platform_for(0x8086, 0xbcce, 0x8086, 0) == 'Intel Open FPGA Stack Platform'