SMC calls to OPTEE instance cross cluster

[vtcao297]

Hello,

My understanding is that Optee core supports multi hw threads (cores), by that I mean optee will maintain the same common global context (code/data/memory) single instance regardless of which cores within a cluster requested the optee smc instruction. My questions are around, does this hold true when there are multiple clusters within an SoC (e.g 2 or 3 clusters of A53 comprising of 4 cores for each cluster)? Will there still be only a single instance of optee core which will handle the SMC request, or will there be a separate instances of optee os for each cluster?

[jenswi-linaro]

As long as the clusters are coherent there can be a single OP-TEE core instance. See for instance the Juno platform.

[vtcao297]

I see, so as long as the fabric NOC is coherent between all the CPU clusters then there will only ever be 1 single instance of Secure OPTEE core payload running which all SMC request will be routed to, is my understanding correct?

[jenswi-linaro]

Yes

[vtcao297]

thanks Jens for your confirmation

[vtcao297]

Sorry to reopen the ticket, 1 more clarification.

At the moment, I'm are not planning to support the PSCI Migrate option, so the OPTEE core context will always remain on cluster0/core0 since that will be the the first core booting up and loading the OPTEE payload, hence this core0 on cluster0 will never be powered-down. Do you see any potential issue within this multiple cluster context? If the clusters are coherent, the SMC should be routed to cluster0/core0 if Migrate option is not implemented or is my understanding incorrect?

[vtcao297]

apologizes for bumping the thread, i would very much like a confirmation if my understanding for the 2nd question above is correct or not? Is there any HW or additional control logic within the ARM CPU subsystem that is required other than the coherent fabric NOC? Our HW team would like to make sure before they close/freeze on the RTL and HW logic.

[jenswi-linaro]

SMCs aren't really routed, they occur on the CPU which executes the instruction. I can't say if you need anything more or not in the ARM CPU subsystem. You'd better check that directly with ARM.

From OP-TEE point of view nothing extra is needed as long as the cores are coherent and the hardware follows the ARM Architecture Reference Manual.

[vtcao297]

thanks Jens

[jbech-linaro]

I'm closing the ticket, either because it has already been answered or that it is no longer relevant or it could be lack of response from the author. Having that said, feel free to re-open the ticket if you have more to add to the ticket.